Appendix C: POST Code Errors
Intel®
Server System SR1625UR TPS
92
Revision 1.5
Intel order number E47487-007
Error Code
Error Message
Response
94C6
LPC component encountered a controller error.
No Pause
94C9
LPC component encountered a resource conflict error.
Pause
9506
ATA/ATPI component encountered a controller error.
No Pause
95A6
PCI component encountered a controller error.
No Pause
95A7
PCI component encountered a read error.
No Pause
95A8
PCI component encountered a write error.
No Pause
9609
Unspecified software component encountered a start error.
No Pause
9641
PEI Core component encountered a load error.
No Pause
9667
PEI module component encountered an illegal software state error.
Halt
9687
DXE core component encountered an illegal software state error.
Halt
96A7
DXE boot services driver component encountered an illegal software state error.
Halt
96AB
DXE boot services driver component encountered invalid configuration.
No Pause
96E7
SMM driver component encountered an illegal software state error.
Halt
0xA022
Processor component encountered a mismatch error.
Pause
0xA027
Processor component encountered a low voltage error.
No Pause
0xA028
Processor component encountered a high voltage error.
No Pause
0xA421
PCI component encountered a SERR error.
Halt
0xA500
ATA/ATPI ATA bus SMART not supported.
No Pause
0xA501
ATA/ATPI ATA SMART is disabled.
No Pause
0xA5A0
PCI Express* component encountered a PERR error.
No Pause
0xA5A1
PCI Express* component encountered a SERR error.
Halt
0xA5A4
PCI Express* IBIST error.
Pause
0xA6A0
DXE boot services driver Not enough memory available to shadow a legacy option ROM.
No Pause
POST Error Beep Codes
The following table lists POST error beep codes. Prior to system video initialization, the BIOS
uses these beep codes to inform users on error conditions. The beep code is followed by a
user-visible code on POST progress LEDs. For complete details, refer to the
Intel
®
S5500/S5520 Server Board Family BIOS External Product Specification
.
Table 67. POST Error Beep Codes
Beeps
Error Message
POST Progress Code
Description
3
Memory error
0xE8, 0xEB, 0xED,
0xEE
System halted because a fatal error related to the memory
was detected.
The Integrated BMC may generate beep codes upon detection of failure conditions. Beep
codes are sounded each time the problem is discovered, such as on each power-up attempt,
but are not sounded continuously. Codes that are common across all Intel
®
Server Boards and
Systems that use same generation chipset are listed in the following table. Each digit in the
code is represented by a sequence of beeps whose count is equal to the digit. For complete
details, refer to the
Intel
®
Server System Integrated Baseboard Management Controller Core
External Product Specification
.
