Errata
R
Intel
®
Celeron
®
Processor in the 478-Pin Package Specification Update
23
AC12.
Performance Counter May Contain Incorrect Value after Being Stopped
Problem:
If a performance counter is stopped on the precise internal clock cycle where the intermediate
carry from the lower 32 bits of the counter to the upper eight bits occurs, the intermediate carry is
lost.
Implication:
When this erratum occurs, the performance counter will contain a value about 4 billion (2
32
) less
than it should.
Workaround:
Since this erratum does not occur if the performance counters are read when running, a possible
workaround is to read the counter before stopping it. Since the lower 32 bits will always be
correct, event counting which does not exceed 2
32
events will not be affected.
Status:
For the steppings affected, see the
Summary Tables of Changes.
AC13.
MCA Error Code Field in IA32_MC0_STATUS Register May become out of
Sync with the Rest of the Register
Problem:
The MCA Error Code field of the IA32_MC0_STATUS register gets written by a different
mechanism than the rest of the register. For uncorrectable errors, the other fields in the
IA32_MC0_STATUS register are only updated by the first error. Any subsequent errors cause the
Overflow Error bit to be asserted until this register is cleared. Because of this erratum, any further
errors that are detected will update the MCA Error Code field without updating the rest of the
register, thereby leaving the IA32_MC0_STATUS register with stale information.
Implication:
When this erratum occurs, the IA32_MC0_STATUS register contains stale information.
Workaround:
None identified.
Status:
For the steppings affected, see the
Summary Tables of Changes.
AC14.
The IA32_MC1_STATUS Register May Contain Incorrect Information for
Correctable Errors
Problem:
When a speculative load operation hits the L2 cache and receives a correctable error, the
IA32_MC1_STATUS register may be updated with incorrect information. The
IA32_MC1_STATUS register should not be updated for speculative loads.
Implication:
When this erratum occurs, the IA32_MC1_STATUS register will contain incorrect information
for correctable errors.
Workaround:
None identified.
Status:
For the steppings affected, see the
Summary Tables of Changes.
