TD-BD-SDCMPTestC User
’
s Manual
69
Rev.1.01
8.1.17. 6-2-12 CMD/DAT Output Variable Timing for SDR
Output High Voltage / Output Low Voltage
The card output signal cannot be verified with this tool. An automatic judgment can be
done by using with the Agilent oscilloscope.
8.1.18. 6-2-13 Clock Input Timing for DDR
It is not possible to measure it with this tool.
8.1.19. 6-2-14 CMD/DAT Input and Output Timing for DDR
CMD/DAT Output Timing for DDR
The card output timing cannot be verified with this tool. An automatic judgment can be
done by using the Agilent oscilloscope.
CMD/DAT Input Timing for DDR
It is possible to measure it with this tool.
