TD-BD-SDCMPTestC User
’
s Manual
40
Rev.1.01
- Data Pattern
Set data pattern. The following describes the definition of each setting.
- Inc
This option sets 32-bit incremental data. The sequence of write data is shown in Figure 7-12.
If the data pattern exceeds 32MByte, it returns to 0x00000000.
Inc
DAT3
CLK
S 0 0 0 0 0 0 0 0 0
DAT2
DAT1
DAT0
S
S
S
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 1
0
0
0 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
First 32bit
(0x00000000)
Second 32bit
(0x00000001)
Third 32bit
(0x00000002)
Figure 7-13
Inc Data Pattern
- Shift0
Shift0 is a data pattern in which 1 bit in the 4-bit data bus becomes H and this outputting H bit is
shifted for every one clock. The data sequence is shown in Figure 7-13.
Shift0
DAT3
CLK
S 0 0 0 1 0 0 0 1
DAT2
DAT1
DAT0
S
S
S
0
0
1
0
1
0
1
0
0
0
0
0
0
0
1
0
1
0
1
0
0
0
0
0
Figure 7-14
Shift0 Data Pattern
