IBM RS/6000 SP, Problem Determination Manual

Page: 114 / 316

This soft copy for use by IBM employees only.
SW0 to SW7 Logical identification of switch chips
• In output files, add 10,000 to the logical number.
•
The frame number is used to build the logical number -
multiply frame number by 10.
SWA1 to SWA8 Master switch chip silkscreen on the board
N1 to N16 Node ports (physical numbering)
E1 to E16 Switch to switch ports
Each switch board contains eight logical switch chips. In fact, on the High
Performance Switch, there are two physical chips per logical switch chip. Each
chip has eight ports to communicate with the nodes, other switch chips, or other
switches.
The switch chips numbered SW4, SW5, SW6 and SW7 handle all the
communications with the nodes using chip ports 0, 1, 2 and 3. The other four
chip ports (4, 5, 6 and 7) are used to communicate with the other switch chips:
SW0, SW1, SW2 and SW3. By routing across to these four chips on the other
side, it is possible for each of the chips that service the nodes to reach the other
three node chips through four different routes.
The following example illustrates this concept.
To communicate from node 14 (N14) to node 16 (N16), the path that a packet
could take is as follows:
•
The packet passes SW4 through port 0, and can exit the switch chip through
the following four routes, which are the chosen routes:
1. Port 7 across to SW3, onto that chip through port 4, exiting on port 7,
over to SW7, onto the chip on port 7
2. Port 6 across to SW2, onto that chip through port 4, exiting on port 7,
over to SW7, onto the chip on port 6
3. Port 5 across to SW1, onto that chip through port 4, exiting on port 7,
over to SW7, onto the chip on port 5
4. Port 4 across to SW0, onto that chip through port 4, exiting on port 7,
over to SW7, onto the chip on port 4
•
Once onto SW7, it will exit through port 3, go through J34 onto the cable, and
onto the switch adapter on node 16 (N16).
This mechanism ensures that there are four routes between each node on a
single switch board in a single partition system.
The switch chips SW3, SW2, SW1, and SW0 handle the communications to the
other switch chips, as well as providing the four routes between all the nodes as
just described. These chips handle the communications to the other switch
boards on ports 0, 1, 2, and 3 (which are unused on a single switch system) and
using ports 4, 5, 6, and 7 to communicate with the chips that connect directly to
the nodes (SW4, SW5, SW6, and SW7).
The connections to other switches will vary, depending on how many switches
are being connected. This will be dealt with later after the switch topology files
have been discussed.
The cabling is slightly different on the SP Switch. The jack connectors are now
associated with different nodes and different jack connectors on other switches.
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SP PD Guide