Figure 2: Mixed DIMM load order
Table 7: DIMM pair load order
CPU0
CPU1
CPU0 only
1st
3A
4A
—
—
2nd
9B
10B
—
—
3rd
1C
6C
—
—
4th
7D
12D
—
—
5th
2E
5E
—
—
6th
8F
11F
—
—
Both CPUs loaded
1st
3A
4A
—
—
2nd
—
—
1A
7A
3rd
9B
10B
—
—
4th
—
—
6B
10B
5th
1C
6C
—
—
6th
—
—
3C
9C
7th
7D
12D
—
—
8th
—
—
4D
12D
Table Continued
50
Optional components
Summary of Contents for Integrity BL860c i4
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