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OEM MANUAL:K6602924
3 SCSI BUS
Revision: 1 / Date: 2003.03.06
Page: 49 / 273
The shortage of DMA transfer capability is accommodated by REQ / ACK offset
( Max. No. of REQ pulses that may be sent prior to receipt of corresponding ACK
pulses.).
After REQ / ACK offset value reaches to the maximum, it is avoided to transmit
the next REQ signals until ACK signals are received.
3.3
STATUS
The status byte is defined as summarized in Table 3.9 and Table 3.10. It is sent from
the controller to the host computer in the Status phase at the end of a command,
except in case the command is canceled by a Abort message, Abort Tag message,
Clear Queue message, Bus Device Reset message, or one of reset conditions
(including Power On Reset).
Table 3.9 Status Byte Format
Bit
Byte
7
6
5
4
3
2
1
0
0
Reserved
0
Reserved
0
Status Byte Code
Reserved
0
Table 3.10 Status Byte Code
Bits of Status Byte
Status
5
4
3
2
1
0
0
0
0
0
GOOD
0
0
0
0
1
CHECK CONDITION
0
0
1
0
0
BUSY
0
1
0
0
0
INTERMEDIATE / GOOD
0
1
1
0
0
RESERVATION CONFLICT
1
0
1
0
0
QUEUE FULL
The status byte codes are described below.
GOOD
:
This status indicates that the controller has completed a command normally.