112
12.2.4
AC Characteristics (5 V, CPU operates at the external clock frequency)
Conditions: V
CC
= 4.5 to 5.5 V, V
SS
= 0 V, T
a
= –25 to +85
°
C, unless otherwise specified.
Item
Symbol
Min
Typ
Max
Unit
Test Conditions
Clock cycle time
t
cyc
0.2
—
1.0
µ
s
Figure 12.1
Clock high width
t
CH
0.4
—
0.6
t
cyc
Figure 12.1
Clock low width
t
CL
0.4
—
0.6
t
cyc
Figure 12.1
Clock fall time
t
Cf
—
—
0.09*
t
cyc
Figure 12.1
Clock rise time
t
Cr
—
—
0.09*
t
cyc
Figure 12.1
I/O port input fall time
t
f
—
—
1.0
µ
s
Figure 12.2
I/O port input rise time
t
r
—
—
1.0
µ
s
Figure 12.2
RES pulse width
t
RWL
20
—
—
t
cyc
Figure 12.3
Power-on time
t
on
0
—
—
ms
Figure 12.3
Power-off time
t
off
0
—
—
ms
Figure 12.3
EEPROM write time
t
EPW
—
—
10
ms
Rewrite
—
—
5
ms
Erase, overwrite
Clock hold time
t
CLKH
20
—
—
t
cyc
Figure 12.4
Clock setup time
t
CLKS
20
—
—
t
cyc
Figure 12.4
Interrupt pulse width (
IRQ
)
t
IRQW
200
—
—
ns
Figure 12.4
Note: * It is assumed that there is no noise on the CLK pin, and the rise and fall of CLK are
straightforward.
CLK
0.5 V
V
CC
×
0.7
t
CH
t
Cr
t
cyc
V
CC
×
0.7
0.5 V
t
Cf
t
CL
0.5 V
Figure 12.1 CLK Input Waveform (V
CC
= 4.5 V to 5.5 V)