Hitachi CP2896TA, Service Manual

Page: 17 / 112

7
VIDEO SECTION
The video section is divided into the following functional
blocks:
- Video Matrix Switch / Scarts
- Colour Decoder / Sync Processor
- Baseband Delay Line
- Feature Boxes
- RGB Video Processor
- CRT module
- Teletext
Video Matrix Switch, ICq1
The TEA6417 is an IIC-bus controlled signal switch, which
makes it possible to switch 8 input sources to 6 outputs.
Each output can be connected to only one input, but one
input may be connected to several outputs. The bandwidth
is 15 MHz and nominal gain from input to output is 6.5 dB.
All switching possibilities are controlled via the IIC-bus
using pins 2 (SDA) and 4 (SCL). The circuit operates with
+10 V supply voltage, that is fed to pins 9 and 12. The +10
V is regulated from +12Vr by zener diode Zdq1.
The inputs and outputs are connected as follows:
Input Signal Source
1 CVBS Scart 3
3 CVBS Scart 1
5 C Scart 2
6 CVBS / Y Scart 2
8 CVBS / Y Cam connector
10 C Cam connector
11 CVBS Tuner
20 CVBS PIP tuner
Output Signal Target
13 CVBS / Y Decoder / Comb filter
14 C Decoder / Comb filter
15 CVBS / Y PIP module
16 C PIP module
17 CVBS / Y Scart 2
18 CVBS Teletext
Scart 1
Scart 1 is fully connected, thus RGB input is also available
from it . In RGB mode, the fast blanking signal from scart
pin 16 is fed to the colour decoder pin 18 and via tq3, tq4,
Cq32 (and NAND gate icf4-4) to the microcontroller pin 6.
The RGB status signal is fed to the microcontroller in order
to activate the correct H-shift setting. It also enables the
colour decoder to choose the input between the RGB sig-
nal and the processed YUV signals. Selection takes place
by a switch block in the colour decoder via the IIC-bus.
Scart 1 has a fixed output connection for the Tuner CVBS
from scart pin 19 via transistors tq9 and Tq2.
Scart 1 also operates as an AV-link connector. The AV-link
output is from microcontroller pin 2, onward via transistor
tq7 and scart pin 10. The AV-link input is from the same
scart pin, onward via diode dq4 and transistor tq8 to the
microcontroller pin 63. The AV-link system makes it possi-
ble to transfer data between the TV set and e.g. a video
recorder.
The system is based on the “P50” standard and enables,
for example, transferring of channel tuning information and
EPG (Electrical Program Guide) programming.
Scart 2
In addition to the S-VHS input possibility, scart 2 is designed
to output the S-VHS signals, which are taken from the cam-
era connectors. Output of the luminance signal takes place
via transistor Tq1 and chrominance via tt3 and tt2.
Scart 2 also operates as an AV-link connector.
Scart 3 (option)
Scart 3 is an optional connector having the same character-
istics as scart 1.
More detailed information can be found in the section enti-
tled “Options, TA710”.
Colour Decoder / Sync Processor, ICd1
General
The TDA9143 is an IIC-bus controlled, alignment-free PAL /
NTSC / SECAM decoder / sync processor.
The colour decoder is able to process CVBS as well as Y / C
signals. The internal fast switch can select either the Y sig-
nal with the UV input signals, or YUV signals made up of
RGB input signals.
The sync processor provides a two level sandcastle pulse
(SC), a horizontal sync pulse (HA) and a vertical sync pulse
(VA).
Input switches
The circuit has a two pin input for the CVBS (pin 26) or Y / C
(pins 26 and 25) input signals. Selection between the sig-
nals is carried out using the IIC-bus.
RGB colour matrix
The RGB signals from scart 1 (or scart 3 ) connector are fed
to input pins 19 (B), 20 (G) and 21 (R). The RGB colour ma-
trix converts RGB signals into the YUV signals. The desired
input signal, between the converted YUV and decoded YUV
signals, is selected by the fast switch. This switch is con-
trolled by the fast blanking signal on pin 18.
Luminance processing
From the input pin 26, the CVBS / Y signal is fed via the Y
clamp circuit to the gyrator-capacitor type notch filters, in-
cluding adjustable luminance delay and chrominance trap.
The luminance delay compensates the delay, that is caused
by the external baseband delay line for the UV signals. The
chrominance trap can be switched to 4.43 MHz (PAL / NTSC),
4.28 MHz (SECAM) or 3.58 MHz (NTSC). Switching is con-
trolled by the standard identification circuit. PAL Y, NTSC
3.58 Y (from the comb filter ) and S-VHS Y signals bypass
the chrominance notch filters in order to preserve the sig-
nal bandwidth. The bypass function takes place automati-
cally via the IIC-bus in S-VHS mode and in PAL / NTSC 3.58
reception, if the comb filter is installed. After the chroma
trap, the Y signal is fed to the switch stage and is output
from pin 12 to the feature box module.