
5
AUDIO SECTION
- Sound Processor
- Audio Power Amplifier
- Headphone Amplifier
Multistandard Sound Processor, ICa2
General
The MSP3410D is a single-chip Multistandard Sound Proc-
essor which uses CMOS technology. The circuit is control-
led by the microcontroller via the IIC-bus.
The sound processor performs simultaneous digital de-
modulation and decoding of NICAM-coded TV stereo
sound, as well as demodulation of FM-mono TV sound. As
an alternative, a two carrier FM system (according to the
German terrestrial specs, A2 stereo), or satellite specs can
be processed by the sound processor.
All FM modulated signals over the range 0.2 MHz to 9.0
MHz can be handled.
The sound processor can select the audio signal source,
convert analog audio signals into digital form, de-empha-
size in several ways - including Wegener Panda 1, 50/75
µ
s
and J17, perform digital FM-identification decoding and
dematrixing, and perform digital baseband processing. It
can also control the volume separately for loudspeaker and
headphones, control bass, treble, graphic equalizer and
balance, perform pseudo stereo and basewidth enlarge-
ment, as well as convert digital audio signals into analog
form by using fourfold oversampled D/A-converters. This
provides an audio spectrum from 20 Hz to 16 kHz with a S/
N ratio of 85 dB.
The sound processor requires an 18.432 MHz crystal, whose
nominal free running frequency should be no more than
±
1 kHz, which means a tolerance of
±
0.005 %.
An audio signal to the sound processor can be taken from
the IF-section, scart 1, scart 2, or scart 3 / camera / VGA-
audio connector (or scart 4) sources. The source is inter-
nally selected in the sound processor. The processed au-
dio signal is fed to several outputs such as loudspeaker
amplifier / adjustable audio output module, headphone
amplifier, scart 1 and scart 2 connectors (scart 3 optional).
The circuit also has a separate output for a subwoofer
amplifier including highpass filters for the loudspeaker
outputs and lowpass filters for the subwoofer output as
integrated into the chip. The upper barrier frequency is
programmable from 50 Hz to 400 Hz in 10 Hz steps. De-
pending on the programming of the upper barrier fre-
quency, the lower barrier frequency for the loudspeaker
channels will also be changed automatically.
An IIS-bus interface with two data inputs is available for
optional audio feature purposes.
In some TV versions, the sound processor may be of type
MSP3400. The only difference is that MSP3400 cannot iden-
tify or process Nicam signals.
The sound processor is split into three functional blocks:
-
Demodulator and decoder section
-
Digital signal processing section performing audio
baseband processing
-
Analog section containing two A/D-converters, nine D/
A-converters and channel selection
The simplified block diagram below shows the architec-
ture of the MSP3410D.
I S_DA_OUT
2
I C-bus Interface
Demodulator
Ident
I S Interface
A/D
A/D
D/A
D/A
SCART Switching Facilities
I S_CL
I S_WS
I S_DA_IN1
FM1 / AM
FM2
NICAM A
NICAM B
2
2
Ident
SCART_L
SCART_R
SCART1_L
SCART1_R
LOUD-
SPEAKER L
SDA
SCL
Sound IF
ANA_IN 1+
ANA_IN 2+
Mono_in
Mono
Loudspeaker
DACM_L
DACM_R
Digital
Function
Processing
D/A
D/A
LOUD-
SPEAKER R
Scart 4
SC4_IN_L
SC4_IN_R
D/A
D/A
D/A
HEADPHONE L
HEADPHONE R
Headphone
DACA_L
DACA_R
SUBWOOFER
DACM_SUB
Subwoofer
ADR-bus
Scart 1
SC1_IN_L
SC1_IN_R
Scart 2
SC2_IN_L
SC2_IN_R
Scart 3
SC3_IN_L
SC3_IN_R
I S1/2L/R
2
I S1/2L/R
2
D/A
D/A
SCART2_L
SCART2_R
Scart 1
SC1_OUT_L
SC1_OUT_R
Scart 2
SC2_OUT_L
SC2_OUT_R
2
I S_DA_IN2
2
2
2
Summary of Contents for CP2896TA
Page 84: ...21 DB700 710 Feature module ...
Page 85: ...22 FC700 Control module ...
Page 88: ...25 HH703 705 CRT module ...
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