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80415F_MSW_GFX4-IR_05-2019_ENG
46
bit
AL1 direct/inverse
R/W
47
bit
AL1 absolute/relative
R/W
48
bit
AL1 normal/symmetrical
R/W
49
bit
AL1 disabled at switch-on
R/W
50
bit
AL1 with memory
R/W
54
bit
AL2 direct/inverse
R/W
55
bit
AL2 absolute/relative
R/W
56
bit
AL2 normal/symmetrical
R/W
57
bit
AL2 disabled at switch-on
R/W
58
bit
AL2 with memory
R/W
Alarm type
406
a1.t
R/W
Alarm type 1
0
407
A2.t
R/W
Alarm type 2
408
54
A3.t
R/W
Alarm type 3
409
A4.t
R/W
Alarm type 4
0
0
0
Direct (high limit)
Absolute
Normal
Inverse (low limit)
Relative
Symmetrical
to activfe setpoint
(window)
0
direct
absolute
normal
1
inverse
absolute
normal
2
direct
relative
normal
3
inverse
relative
normal
4
direct
absolute
symmetrical
5
inverse
absolute
symmetrical
6
direct
relative
symmetrical
7
inverse
relative
symmetrical
Table of alarm behaviour
36
bit
AL3 direct/inverse
R/W
37
bit
AL3 absolute/relative
R/W
38
bit
AL3 normal/symmetrical
R/W
39
bit
AL3 disabled at switch-on
R/W
40
bit
AL3 with memory
R/W
70
bit
AL4 direct/inverse
R/W
71
bit
AL4 absolute/relative
R/W
72
bit
AL4 normal/symmetrical
R/W
73
bit
AL4 disabled at switch-on
R/W
74
bit
AL4 with memory
R/W
+ 8 to disable at switch-on until first setpoint
+ 16 to enable memory latch
+ 32 Hys becomes delay time for activation of alarm (0...999 sec.)
(excluding absolute symmetrical)
+ 64 Hys becomes delay time for activation of alarm (0...999 min.)
(excluding absolute symmetrical)
+ 136 to disable at switch-on or at change of setpoint until first setpoint
+ 256 only for alarms with memory and delay time: the delay time becomes
a timed hysteresis (with time stopped in case of SBR condition: when SBR
condition disappears the delay time starts counting from zero)