66 SBC330 3U VPX Single Board Computer
Publication No. SBC330-0HH/3
The
Watchdog
Timer
can
be
extended
to
generate
an
interrupt
at
a
given
value
by
setting
the
Watchdog
Interrupt
Value
register
to
a
value
smaller
than
the
preset
value.
Setting
a
higher
value
than
the
preset
will
never
generate
an
interrupt.
This
is
useful
for
informing
a
user
that
the
system
is
about
to
reset.
For
instance,
if
a
slow
clock
and
the
maximum
preset
value
is
selected
such
that
the
Watchdog
expires
after
52.4
seconds
and
the
normal
software
is
set
to
service
the
Watchdog
every
40
seconds,
the
Watchdog
Interrupt
Register
can
be
set
so
that
the
CPU
can
issue
a
warning
to
the
user
that
the
system
will
reset
in
5
seconds.
The
interrupt
occurrence
is
calculated
as
follows:
(Watchdog
timer
period
–
Watchdog
interrupt)
*
clock
period
NOTE
The Watchdog interrupt is not yet implemented.
6.16.1 Watchdog 0 and 1 control register
6.16.2 Watchdog 0 and 1 preset register
Chip
Select
CS2
Offset
0x0090
(Watchdog
0)
0x0098
(Watchdog
1)
LAD Bit
Reg Bit
R/W
Description
Reset Value
15
0
R
Watchdog status
0 = Watchdog enabled
1 = Watchdog disabled
0x0
14
1
R
Watchdog expired
0 = Watchdog not expired
1 = Watchdog expired
0x0
13
2
R
Watchdog Interrupt
0 = Watchdog interrupt inactive
1 = Watchdog interrupt active
0x0
12
3
R/W
Fast or Slow Clock Select
0 = Slow clock
1 = Fast clock
0x0
11 & 10
4 & 5
R/W
Stop & Clear
Write ‘01’ followed by ‘10’ to
service the Watchdog
0x00
9 & 8
6 & 7
R/W
Run & Load
Write ‘01’ followed by ‘10’ to start
the Watchdog
0x00
Chip
Select
CS2
Offset
0x0094
(Watchdog
0)
0x009C
(Watchdog
1)
LAD Bit
Reg Bit
R/W
Description
Reset Value
15 to 0
0 to 15
R/W
Watchdog preset value: 0 to 65535
0xFFFF
