System Design and Layout
GFK-0356Q
Chapter 12 System Design
12-19
12
Allowable Module Locations
MODEL 331/340/341
and 350/351/352/360/
363/364 5-Slot Expansion
HIGH SPEED COUNTER
GENIUS COMMUNICATIONS
DISCRETE INPUT/OUTPUT
HIGH SPEED COUNTER
GENIUS COMMUNICATIONS
MODEL 311/313
(5-SLOT)
MODEL 331/340/341
and 350/351/352/360/
363/364 10-Slot Expansion
DISCRETE INPUT/OUTPUT
HIGH SPEED COUNTER
GENIUS COMMUNICATIONS
MODEL 313
(10-SLOT)
DISCRETE INPUT/OUTPUT
HIGH SPEED COUNTER
GENIUS COMMUNICATIONS
MODEL 331/340/341
and 350/351/352/360/
363/364 10-Slot CPU
DISCRETE INPUT/OUTPUT
HIGH SPEED COUNTER
GENIUS COMMUNICATIONS
MODEL 331/340/341
and 350/351/352/360/
363/364 5-Slot CPU
C
P
U
C
P
U
DISCRETE INPUT/OUTPUT
ANALOG INPUT/OUTPUT
ANALOG INPUT/OUTPUT
ANALOG INPUT/OUTPUT
ANALOG INPUT/OUTPUT
ANALOG INPUT/OUTPUT
MOTION MATE APM300/DSM302
I/O LINK INTERFACE
ENHANCED GENIUS COMM.
MOTION MATE APM300/DSM302
I/O LINK INTERFACE
ENHANCED GENIUS COMM.
MOTION MATE APM300/DSM302
I/O LINK INTERFACE
ENHANCED GENIUS COMM.
PCM / ADC / CMM / SLP
MOTION MATE APM300/DSM302
I/O LINK INTERFACE
ENHANCED GENIUS COMM.
PCM / ADC / CMM / SLP
MOTION MATE APM300/DSM302
I/O LINK INTERFACE
ENHANCED GENIUS COMM.
HIGH SPEED COUNTER
GENIUS COMMUNICATIONS
DISCRETE INPUT/OUTPUT
ANALOG INPUT/OUTPUT
MOTION MATE APM300/DSM302
I/O LINK INTERFACE
ENHANCED GENIUS COMM.
I/O PROCESSOR
I/O PROCESSOR
I/O PROCESSOR
I/O PROCESSOR
I/O PROCESSOR
I/O PROCESSOR
GENIUS BUS CONTROLLER
GENIUS BUS CONTROLLER
GENIUS BUS CONTROLLER
GENIUS BUS CONTROLLER
GENIUS BUS CONTROLLER
GENIUS BUS CONTROLLER
ETHERNET INTERFACE
ETHERNET INTERFACE
ETHERNET INTERFACE
ETHERNET INTERFACE
ETHERNET INTERFACE
ETHERNET INTERFACE
* For location of FIP modules in baseplates, refer to the applicable FIP module user's manual.
TEMPERATURE CONTROL
TEMPERATURE CONTROL
TEMPERATURE CONTROL
TEMPERATURE CONTROL
TEMPERATURE CONTROL
TEMPERATURE CONTROL
Figure 12-2. Allowable Location of Modules