Epson S1C17704, Technical Manual

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11 16-BIT TIMERS (T16)
S1C17704 TECHNICAL MANUAL
EPSON
11-15
0x4226/0x4246/0x4266: 16-bit Timer Ch. x Control Registers (T16_CTL x )
Register name Address Bit Name Function Setting Init. R/W Remarks
16-bit Timer
Ch.
x Control
Register
(T16_CTL
x )
0x4226
0x4246
0x4266
(16 bits)
D15–11 – reserved – – – 0 when being read.
D10 CKACTV External clock active level select 1 High 0 Low 1 R/W
D9–8 CKSL[1:0] Input clock and pulse width
measurement mode select CKSL[1:0] Mode 0x0 R/W
0x3
0x2
0x1
0x0 reserved
Pulse width
External clock
Internal clock
D7–5 – reserved – – – 0 when being read.
D4 TRMD Count mode select 1 One shot 0 Repeat 0 R/W
D3–2 – reserved – – – 0 when being read.
D1 PRESER Timer reset 1 Reset 0 Ignored 0 W
D0
PRUN
Timer run/stop control 1 Run 0 Stop 0 R/W
Note : The letter ‘ x ’ in register names, etc., denotes a channel number from 0 to 2.
0x4226: 16-bit Timer Ch.0 Control Register (T16_CTL0)
0x4246: 16-bit Timer Ch.1 Control Register (T16_CTL1)
0x4266: 16-bit Timer Ch.2 Control Register (T16_CTL2)
D[15:11] Reserved
D10 CKACTV: External Clock Active Level Select Bit
Selects an external input pulse polarity or a count edge of the external clock.
1 (R/W): Active high/rising edge (default)
0 (R/W): Active low/falling edge
In external clock mode (CKSL[1:0] = 0x1), select either rising edges of the external input clock or
falling edges as the count timings. In pulse width measurement mode (CKSL[1:0] = 0x2), select the
polarity of the external input pulse.
D[9:8] CKSL[1:0]: Input Clock and Pulse Width Measurement Mode Select Bits
Selects a 16-bit timer operating mode.
Table 11.9.3 Selecting Operating Mode
CKSL[1:0] Operating mode
0x3 Reserved
0x2 Pulse width measurement mode
0x1 External clock mode
0x0 Internal clock mode
(Default: 0x0)
In internal clock mode, the timer uses the prescaler output clock as the count clock. The timer starts
counting down from the counter initial value set in the reload data register and outputs the underflow
signal when the counter underflows. The underflow signal is used to generate an interrupt and a clock
for the internal serial interface. The period until an underflow occurs can be programmed minutely
according to the prescaler clock and counter initial value selections, so this mode is useful for
generating a serial transfer clock or a one-shot time measurement.
In external clock mode, the timer uses the clock or pulses input from an I/O port (Ch.0: P16, Ch.1: P07,
Ch.2: P06) as the count clock. Thus the timer can be used as an event counter. The timer operation is
the same as internal clock mode except the count clock source.
In pulse width measurement mode, the internal clock is supplied to the counter only while an external
pulse input from the external clock port is the active level specified. This makes it possible to generate
an interrupt when a pulse longer than a specified width is input or to measure the input pulse width.
D[7:5] Reserved