Epson Endeavor P60, User Manual

Page: 113 / 135

Appendix A
Specificafions
CPU and Memory
CPU
System speed
System
memory
Cache
memory
Intel Pentium 60 MHz microprocessor;
backward compatible with 8086, 80286,
i386,
TM
and i486
TM
CPUs; supports read and
write burst mode bus cycles; built-in 16KB
write-back cache; integrated math
coprocessor
High and low speeds available; high speed
is 60 MHz and low speed is simulated
8 MHz for compatibility; speed selection
through Setup program or keyboard
commands
8MB standard memory on two 4MB
SIMMs; expandable to 128MB using lMB,
2MB, 4MB, SMB, 16MB, and 32MB SIMMs;
SIMMs must be 32-bit or 36-bit, 72-pin,
70ns or faster, tin-plated, fast-page mode,
parity/ no parity type (see page 4-11 for a
list of approved SIMMs)
Built-in 16KB of internal write-back cache
in the Pentium microprocessor; 256KB of
secondary, direct-mapped, write-through
cache on eight 32KB x 8,15ns SRAMs on
the main system board; tag and control
logic on the 82434LX PCMC core chip
S p e c i f i c a t i o n s
A-l