8
Step 4
Verify storage-system back-end connections
Use the information below and the illustration on the following page to verify the
bus (loop) cabling between the SPE and the DAE3Ps. Make sure you connect the
back-end cabling between the cabinets.
The illustration depicts a complete DL4106 configuration with three cabinets. The cabinet with
the CX3-80 storage system and the DL engine is in the middle with the first spillover cabinet
on the left, and the second spillover cabinet on the right.
A DL4106 configuration with fewer DAE3Ps looks different from the illustration shown on the
following page.
The CX3-80 SPE2 supports four redundant Fibre Channel back-end buses: 0, 1, 2 and
3 from SP A and 0, 1, 2, and 3 from SP B. On each bus the two independent loops
from SP A and SP B are paired, and share access to the same dual-port disk drives.
Each CX3-80 storage processor has four back-end (BE) ports that connect to the
corresponding primary (PRI) ports on the first disk enclosure in each bus. The disk-
array enclosure expansion (EXP) ports connect to the next PRI ports in their loops.
For the system to boot and operate, the first DAE3P – connected to BE 0 on both SPs
– must have enclosure address (EA) 0. A DAE3P with boot disks and the CX3-80
operating system is always assigned enclosure address 0 prior to shipment.
Each DAE3P in a bus requires a unique EA. The first DAE3P has an EA of 0, since it is
the first EA on the bus (bus 0). A second DAE3P (the first on bus 1) also has an EA of
0; a DAE3P connected to BE 2 or BE 3 is also EA 0 on that bus. Numbering
sequentially, the second EA on each bus is 1, the third 2, the fourth 3, and so on.
