LPT-11 Pinout
The pinout of the LPT-11 transceiver is shown in table 2.1. The interconnection
between the LPT-11 and a Neuron Chip is shown in the block diagram in figure 2.1.
See figure 3.1 for the physical location of pin 1.
Table 2.1
LPT-11 Transceiver Pinout
Name
Pin#
Function
NET_A
1
Connection to TP network, polarity insensitive
NET_B
2
Connection to TP network, polarity insensitive
V+
3
Power supply input voltage (
≈
35VDC)
INDUCTOR
4
Power supply inductor connection
Vcc
5
+5VDC power output
GND
6
Power supply ground
CLK
7
Transceiver clock input from Neuron Chip
NC
8
No Connect (not connected internally)
TXD
9
Neuron Chip CP1
RXD
10
Neuron Chip CP0
NC
11
No Connect (not connected internally)
NC
12
No Connect (not connected internally)
NC
13
No Connect (not connected internally)
NC
14
No Connect (not connected internally)
2-2
Electrical Interface