TAS5611
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SLAS681 –NOVEMBER 2009
PIN FUNCTIONS (continued)
PIN
Function
(1)
DESCRIPTION
NAME
PHD NO.
DKD NO.
READY
19
19
O
Normal operation; open drain; active high
RESET
2
4
I
Device reset Input; active low
SD
15
17
O
Shutdown signal, open drain, active low
Power supply for digital voltage regulator requires a 10-μF capacitor in parallel
VDD
64
2
P
with a 0.1-μF capacitor to GND for decoupling.
VI_CM
6
8
O
Analog comparator reference node requires close decoupling of 1nF to GND
VREG
9
11
P
Digital regulator supply filter pin requires 0.1-μF capacitor to GND
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Block Diagram
TAS5611
SLAS681 –NOVEMBER 2009
www.ti.com
PIN FUNCTIONS
PIN
Function
(1)
DESCRIPTION
NAME
PHD NO.
DKD NO.
AGND
8
10
P
Analog ground
BST_A
54
43
P
HS bootstrap supply (BST), external 0.033
μ
F capacitor to OUT_A required.
BST_B
41
34
P
HS bootstrap supply (BST), external 0.033
μ
F capacitor to OUT_B required.
BST_C
40
33
P
HS bootstrap supply (BST), external 0.033
μ
F capacitor to OUT_C required.
BST_D
27
24
P
HS bootstrap supply (BST), external 0.033
μ
F capacitor to OUT_D required.
CLIP
18
—
O
Clipping warning; open drain; active low
C_STARTUP
3
5
O
Startup ramp requires a charging capacitor of 4.7 nF to GND in BTL mode
FREQ_ADJ
12
14
I
PWM frame rate programming pin requires resistor to GND
7, 23, 24, 57,
GND
9
P
Ground
58
GND_A
48, 49
38
P
Power ground for half-bridge A
GND_B
46, 47
37
P
Power ground for half-bridge B
GND_C
34, 35
30
P
Power ground for half-bridge C
GND_D
32, 33
29
P
Power ground for half-bridge D
GVDD_A
55
—
P
Gate drive voltage supply requires 0.1
μ
F capacitor to GND_A
GVDD_B
56
—
P
Gate drive voltage supply requires 0.1
μ
F capacitor to GND_B
GVDD_C
25
—
P
Gate drive voltage supply requires 0.1
μ
F capacitor to GND_C
GVDD_D
26
—
P
Gate drive voltage supply requires 0.1
μ
F capacitor to GND_D
GVDD_AB
—
44
P
Gate drive voltage supply requires 0.22
μ
F capacitor to GND_A/GND_B
GVDD_CD
—
23
P
Gate drive voltage supply requires 0.22
μ
F capacitor to GND_C/GND_D
INPUT_A
4
6
I
Input signal for half bridge A
INPUT_B
5
7
I
Input signal for half bridge B
INPUT_C
10
12
I
Input signal for half bridge C
INPUT_D
11
13
I
Input signal for half bridge D
M1
20
20
I
Mode selection
M2
21
21
I
Mode selection
M3
22
22
I
Mode selection
NC
59–62
–
—
No connect, pins may be grounded.
OC_ADJ
1
3
O
Analog overcurrent programming pin requires 30k
Ω
resistor to GND.
13
15
I/O
Oscillator master/slave output/input.
OSC_IO–
14
16
I/O
Oscillator master/slave output/input.
OTW
—
18
O
Overtemperature warning signal, open drain, active low.
OTW1
16
—
O
Overtemperature warning signal, open drain, active low.
OTW2
17
—
O
Overtemperature warning signal, open drain, active low.
OUT_A
52, 53
39, 40
O
Output, half bridge A
OUT_B
44, 45
36
O
Output, half bridge B
OUT_C
36, 37
31
O
Output, half bridge C
OUT_D
28, 29
27, 28
O
Output, half bridge D
PSU_REF
63
1
P
PSU Reference requires close decoupling of 330 pF to GND
Power supply input for half bridge A requires close decoupling of 2uF capacitor
PVDD_A
50, 51
41, 42
P
GND_A
Power supply input for half bridge B requires close decoupling of 2uF capacitor
PVDD_B
42, 43
35
P
GND_B
Power supply input for half bridge C requires close decoupling of 2uF
PVDD_C
38, 39
32
P
capacitor GND_C
Power supply input for half bridge D requires close decoupling of 2uF
PVDD_D
30, 31
25, 26
P
capacitor GND_D
(1) I = Input, O = Output, P = Power
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Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s):
TAS5611
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