Cypress MB90910 Series, Manual

Page: 23 / 64

Document Number: 002-04578 Rev. *A Page 23 of 64
MB90910 Series
(Continued)
Address Register
Abbrevia-
tion
Access Resource name Initial value
00004C
H
PPG E Operation Mode Control
Register
PPGCE W, R/W
16-bit PPG E/F
01000111
B
00004D
H
PPG F Operation Mode Control
Register
PPGCF W, R/W 01000001
B
00004E
H
PPG E/PPG F Count Clock Select
Register
PPGEF R/W 00000010
B
00004F
H
Reserved
000050
H
Input Capture Control Status 0/1 ICS01 R/W
Input Capture 0/1
00000000
B
000051
H
Input Capture Edge 0/1 ICE01 R/W, R 111010XX
B
000052
H
Input Capture Control Status 2/3 ICS23 R/W
Input Capture 2/3
00000000
B
000053
H
Input Capture Edge 2/3 ICE23 R 111111XX
B
000054
H
to
000063
H
Reserved
000064
H
Timer Control Status 2 TMCSR2 R/W
16-bit Reload Timer 2
00000000
B
000065
H
Timer Control Status 2 TMCSR2 R/W 11110000
B
000066
H
Timer Control Status 3 TMCSR3 R/W
16-bit Reload Timer 3
00000000
B
000067
H
Timer Control Status 3 TMCSR3 R/W 11110000
B
000068
H
A/D Control Status 0 ADCS0 R/W
A/D Converter
00011110
B
000069
H
A/D Control Status 1 ADCS1 R/W, W 00000001
B
00006A
H
A/D Data 0 ADCR0 R 00000000
B
00006B
H
A/D Data 1 ADCR1 R 11111100
B
00006C
H
A/D Converter Setting 0 ADSR0 R/W 00000000
B
00006D
H
A/D Converter Setting 1 ADSR1 R/W 00000000
B
00006E
H
Reserved
00006F
H
ROM Mirror Function Select Register ROMM W ROM Mirror 11111101
B
000070
H
to
00007F
H
Reserved
000080
H
to
00008F
H
Reserved for CAN Controller 1. Refer to “ CAN Controllers ”
000090
H
to
00009D
H
Reserved
00009E
H
Address Detect Control Register 0 PACSR0 R/W
Address Match
Detection 0
11000000
B