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Document Number: 002-04578 Rev. *A 

Page 5 of 64

MB90910 Series

(Continued)

*1: It is setting of Jumper switch (TOOL VCC) when emulator (MB2147-01) is used. Please refer to the Emulator hardware manual 

for the details.

*2: Contact the sales or support representative if using other than those above of FPGA data and adaptor boards. 

Part number

Parameter

MB90V950AMAS

MB90F912BS

 MB90911AS

16-bit
Input capture

8 channels

4 channels

Rising edge, falling edge or rising & falling edge sensitive
Signals an interrupt upon external event

8/16-bit 
PPG

8 channels (16-bit) /16 channels 
(8-bit) 
Sixteen 8-bit reload counters
Sixteen 8-bit reload registers for L 
pulse width
Sixteen 8

-

bit reload registers for H 

pulse width

3 channels (16-bit) /6 channels (8-bit) 
Six 8-bit reload counters
Six 8-bit reload registers for L pulse width
Six 8-bit reload registers for H pulse width

Supports 8-bit and 16-bit operation modes
A pair of 8-bit reload counters can be configured as one 16-bit reload counter or as
   8-bit prescaler plus 8-bit reload counter
Operating clock freq. : fsys, fsys/2

1

, fsys/2

2

, fsys/2

3

, fsys/2

4

 or 128 

s@fosc 

 4 MHz

 (

fsys

 

 

Machine clock frequency

fosc

 

 

Oscillation clock frequency

CAN
controller

3 channels

1 channel

Conforms to CAN Specification Version 2.0 Part A and B
Automatic re-transmission in case of error
Automatic transmission in response to Remote Frames
Prioritized 16 message buffers for data and ID’s
Supports multiple messages
Flexible configuration of acceptance filtering : 
Full bit compare/Full bit mask/Two partial bit masks
Supports up to 1 Mbps

DTP/External 
interrupt
 (8 channels) 

Can be used rising edge, falling edge, starting up by H/L level input, external interrupt, 
expanded intelligent I/O services (EI

2

OS)

D/A Converter

8-bit 

 2 channels

I/O Ports

Virtually all external pins can be used as general purpose I/O port
All ports are push-pull outputs
Bit-wise settable as input/output or peripheral signal
Can be configured 8 as CMOS schmitt trigger/ automotive inputs  (in blocks of 8 pins) 
TTL input level settable for external bus (32-pin only for external bus)

Flash memory
(Flash memory product 
only)

Supports automatic programming, Embedded Algorithm
Write/Erase/Erase-Suspend/Resume commands
A flag indicating completion of the algorithm
Boot block configuration
Erase can be performed on each block
Flash Security

Summary of Contents for MB90910 Series

Page 1: ...clock Instruction system best suited to controller 16 Mbytes CPU memory space 24 bit internal addressing Wide choice of data types bit byte word and long word Wide choice of addressing modes 23 types...

Page 2: ...D converter 16 channels Resolution is selectable between 8 bit and 10 bit Activation by external trigger input is allowed Conversion time 3 s at 24 MHz machine clock including sampling time Program pa...

Page 3: ...36 Electrical Characteristics 38 Absolute Maximum Ratings 38 Recommended Conditions 40 DC Characteristics 41 AC Characteristics 43 Clock Timing 43 Reset Standby Input 45 Power on Reset 46 UART 46 Tri...

Page 4: ...ettings using a dedicated reload timer Special synchronous options for adapting to different synchronous serial protocols LIN functionality working either as master or slave LIN device Supported by LI...

Page 5: ...22 fsys 23 fsys 24 or 128 s fosc 4 MHz fsys Machine clock frequency fosc Oscillation clock frequency CAN controller 3 channels 1 channel Conforms to CAN Specification Version 2 0 Part A and B Automati...

Page 6: ...AVss RST Vcc Vss C P40 P41 P82 SIN0 INT14R TIN2 P50 AN8 SIN2 AVcc P44 FRCK0 P80 ADTG INT12R P51 AN9 SOT2 X0 X1 P67 AN7 PPGE F AVR P60 AN0 P61 AN1 P62 AN2 P63 AN3 P64 AN4 P65 AN5 PPGA B P27 IN3 P26 IN2...

Page 7: ...interrupt request input pin for INT12R 12 P50 L General purpose I O port AN8 Analog input pin for A D converter SIN2 Serial data input pin for UART2 13 P51 H General purpose I O port AN9 Analog input...

Page 8: ...ndenser 27 X0 A Oscillation input pin 28 X1 Oscillation output pin 29 to 32 P27 to P24 G General purpose I O port The register can be set to select whether to use a pull up resistor This function is e...

Page 9: ...pose I O port SOT0 Serial data output pin for UART0 TOT2 Output pin for reload timer 2 43 P84 F General purpose I O port SCK0 Clock I O pin for UART0 INT15R External interrupt request input pin for IN...

Page 10: ...lation feedback resistor approx 1 M Evaluation product B Unused C MASK ROM product Evaluation product CMOS hysteresis input pin Flash memory product CMOS input pin D MASK ROM product Evaluation produc...

Page 11: ...Document Number 002 04578 Rev A Page 11 of 64 MB90910 Series Continued E CMOS hysteresis input pin Type Circuit Remarks R Pull up resistor CMOS hysteresis inputs...

Page 12: ...tomotive input With the standby time input shutdown function H CMOS level output IOL 4 mA IOH 4 mA CMOS hysteresis inputs VIH0 8Vcc VIL0 2Vcc With the standby time input shutdown func tion Automotive...

Page 13: ...el output IOL 4 mA IOH 4 mA CMOS hysteresis input VIH0 7Vcc VIL0 3Vcc With standby time input shutdown function Automotive input With standby time input shutdown function CMOS hysteresis inputs VIH0 8...

Page 14: ...c VIL0 2Vcc With the standby time input shutdown func tion Automotive input With the standby time input shutdown func tion CMOS hysteresis input VIH0 7Vcc VIL0 3Vcc With the standby time input shutdow...

Page 15: ...atment of unused pins Leaving unused input pins open may result in permanent damage of the device due to misbehavior or latch up Therefore they must be pulled up or pulled down through resistors In th...

Page 16: ...es of malfunctions Make sure to provide bypass capacitors via shortest distance from X0 X1 pins crystal oscillator or ceramic resonator and ground lines and make sure that lines of oscillation circuit...

Page 17: ...the power again 13 Notes on using CAN function To use CAN function please set 1 to DIRECT bit of CAN direct mode register CDMR If DIRECT bit is set to 0 initial value wait states will be performed wh...

Page 18: ...OT0 AD15 to AD00 A23 to A16 ALE RD WRL WRH HRQ HAK RDY CLK INT15 to INT8 INT15R to INT8R INT7 to INT0 CKOT AN23 to AN0 Clock controller F2MC 16LX core 16 bit I O timer 0 16 bit free run timer 1 Input...

Page 19: ...VSS AVCC SIN0 SIN1 SIN2 SCK0 SCK1 SCK2 IN0 to IN3 PPGA B PPGB A SOT0 SOT1 SOT2 1 Only for MB90F912BS 2 Only for MB90911AS Clock controller F2 MC 16LX core Input capture 4 channels 16 bit I O timer 0 C...

Page 20: ...only in bank FF FFFFFFH FF0000H FEFFFFH FE0000H FDFFFFH FD0000H FCFFFFH FC0000H FBFFFFH FB0000H FAFFFFH FA0000H F9FFFFH 0000EFH 000000H F90000H F8FFFFH F80000H 00FFFFH 007FFFH 007900H 0078FFH 000100H...

Page 21: ...111111B 00000CH Port 6 Analog Input Enable Register ADER6 R W Port 6 A D 11111111B 00000DH Reserved 00000EH Input Level Select Register 0 ILSR0 R W Ports XXXXXXXXB 00000FH Input Level Select Register...

Page 22: ...smission Data Register 1 RDR1 TDR1 R W 00000000B 11111111B 00002BH Serial Status Register 1 SSR1 R R W 00001000B 00002CH Extended Communication Control Register 1 ECCR1 R W R W 000000XXB 00002DH Exten...

Page 23: ...rved 000064H Timer Control Status 2 TMCSR2 R W 16 bit Reload Timer 2 00000000B 000065H Timer Control Status 2 TMCSR2 R W 11110000B 000066H Timer Control Status 3 TMCSR3 R W 16 bit Reload Timer 3 00000...

Page 24: ...0000B0H Interrupt Control Register 00 ICR00 W R W Interrupt Control 00000111B 0000B1H Interrupt Control Register 01 ICR01 W R W 00000111B 0000B2H Interrupt Control Register 02 ICR02 W R W 00000111B 0...

Page 25: ...00B 0000DAH Reception Transmission Data Register 2 RDR2 TDR2 R W 00000000B 11111111B 0000DBH Serial Status Register 2 SSR2 R R W 00001000B 0000DCH Extended Communication Control Register 2 ECCR2 R W R...

Page 26: ...t Capture Register 2 IPCP2 R 00000000B 007926H Input Capture Register 3 IPCP3 R 00000000B 007927H Input CaptureRegister 3 IPCP3 R 00000000B 007928H to 00793FH Reserved 007940H Timer Data Register 0 TC...

Page 27: ...9BFH Reserved 0079C0H to 0079DFH Reserved 0079E0H Detect Address Setting Register 0 PADR0 R W Address Match Detection 0 XXXXXXXXB 0079E1H Detect Address Setting Register 0 PADR0 R W XXXXXXXXB 0079E2H...

Page 28: ...ster 3 PADR3 R W XXXXXXXXB 0079F2H Detect Address Setting Register 3 PADR3 R W XXXXXXXXB 0079F3H Detect Address Setting Register 4 PADR4 R W XXXXXXXXB 0079F4H Detect Address Setting Register 4 PADR4 R...

Page 29: ...t or extended frame formats Bit rate programmable from 10 kbps s to 1 Mbps s when input clock is at 16 MHz List of Control Registers 1 Address Register Abbreviation Access Initial Value CAN1 000080H M...

Page 30: ...111B 007D07H 007D08H IDE register IDER R W XXXXXXXX XXXXXXXXB 007D09H 007D0AH Transmit RTR register TRTRR R W 00000000 00000000B 007D0BH 007D0CH Remote frame receive waiting register RFWTR R W XXXXXXX...

Page 31: ...H XXXXXXXX XXXXXXXXB 007C27H 007C28H ID register 2 IDR2 R W XXXXXXXX XXXXXXXXB 007C29H 007C2AH XXXXXXXX XXXXXXXXB 007C2BH 007C2CH ID register 3 IDR3 R W XXXXXXXX XXXXXXXXB 007C2DH 007C2EH XXXXXXXX XXX...

Page 32: ...R W XXXXXXXX XXXXXXXXB 007C49H 007C4AH XXXXXXXX XXXXXXXXB 007C4BH 007C4CH ID register 11 IDR11 R W XXXXXXXX XXXXXXXXB 007C4DH 007C4EH XXXXXXXX XXXXXXXXB 007C4FH 007C50H ID register 12 IDR12 R W XXXXX...

Page 33: ...er 4 DLCR4 R W XXXXXXXXB 007C69H 007C6AH DLC register 5 DLCR5 R W XXXXXXXXB 007C6BH 007C6CH DLC register 6 DLCR6 R W XXXXXXXXB 007C6DH 007C6EH DLC register 7 DLCR7 R W XXXXXXXXB 007C6FH 007C70H DLC re...

Page 34: ...XXXXXXXXB 007CA8H to 007CAFH Data register 5 8 bytes DTR5 R W XXXXXXXXB to XXXXXXXXB 007CB0H to 007CB7H Data register 6 8 bytes DTR6 R W XXXXXXXXB to XXXXXXXXB 007CB8H to 007CBFH Data register 7 8 byt...

Page 35: ...of 64 MB90910 Series Continued Address Register Abbreviation Access Initial Value CAN1 007CF0H to 007CF7H Data register 14 8 bytes DTR14 R W XXXXXXXXB to XXXXXXXXB 007CF8H to 007CFFH Data register 15...

Page 36: ...0000B3H Reserved N 18 FFFFB4H 16 bit reload timer 2 Y1 19 FFFFB0H ICR04 0000B4H 16 bit reload timer 3 Y1 20 FFFFACH Reserved N 21 FFFFA8H ICR05 0000B5H Reserved N 22 FFFFA4H PPG C D N 23 FFFFA0H ICR0...

Page 37: ...O service only one can use extended intelligent I O service at a time When either of the 2 peripheral resources sharing the ICR register specifies extended intelligent I O service the other one canno...

Page 38: ...L level average output current IOLAV1 4 mA 4 IOLAV2 30 mA 5 L level maximum overall output current IOL1 125 mA 4 IOL2 160 mA 5 L level average overall output current IOLAV1 40 mA 4 105 C TA 125 C IOL...

Page 39: ...oller pin does not exceed rated values either instantaneously or for prolonged periods Note that when the microcontroller drive current is low such as in the power saving modes the B input potential m...

Page 40: ...ing condition ranges Operation outside these ranges may adversely affect reliability and could result in device failure No warranty is made with respect to uses operating conditions or combinations no...

Page 41: ...els are selected VILA VSS 0 3 0 5 VCC V Pin inputs if Automotive input levels are selected VILS P50 P82 P85 VSS 0 3 0 3 VCC V Pin inputs if CMOS hys teresis input levels are selected VILR RST VSS 0 3...

Page 42: ...22 5 30 mA VCC 5 0 V Internal frequency 2 MHz At normal operation 3 7 mA VCC 5 0 V Internal frequency 32 MHz At writing Flash memory 50 65 mA VCC 5 0 V Internal frequency 32 MHz At erasing Flash memo...

Page 43: ...When using an oscillation circuit 4 5 MHz PLL 6 When using an oscillation circuit 4 4 MHz PLL 8 When using an oscillation circuit Clock cycle time tCYL X0 X1 62 5 333 ns When using an oscillation circ...

Page 44: ...imum oscillation clock frequency is 16 MHz 5 5 3 5 4 1 5 32 4 0 Guaranteed operation range Guaranteed PLL operation range Internal clock fCP MHz Power supply voltage V CC V Guaranteed PLL Operation Ra...

Page 45: ...hundreds of s and several ms An External clock of oscillation time is 0 ms Parameter Symbol Pin name Value Unit Remarks Min Max Reset input time tRSTL RST 500 ns Under normal operation Oscillation ti...

Page 46: ...n Value Unit Remarks Min Max Power on rise time tR VCC 0 05 30 ms Power off time tOFF VCC 1 ms Due to repetitive operation Parameter Symbol Condition Value Unit Min Max Serial clock cycle time tSCYC I...

Page 47: ...47 of 64 MB90910 Series SCK SOT SIN VIL VIH tSHIXI tSLOVI 2 4 V 0 8 V 2 4 V 0 8 V tSCYC tIVSHI Internal Clock Shift Operation SCK SOT SIN tSLSH tSHSL tF tR tSLOVE tIVSHE tSHIXE VIH VIL VIH VIL 2 4 V...

Page 48: ...SHOVI 50 50 ns SIN SCK setup time tIVSLI tcp 80 ns SCK SIN hold time tSLIXI 0 ns Serial clock H pulse width tSHSL External shift clock opera tion CL 80pF 1TTL 3 tcp tR ns Serial clock L pulse width tS...

Page 49: ...Document Number 002 04578 Rev A Page 49 of 64 MB90910 Series SCK SOT SIN tSHSL tSLSH tR tF tSHOVE tIVSLE tSLIXE VIH VIL VIH VIL 2 4 V 0 8 V External Clock Shift Operation...

Page 50: ...alue Unit Min Max Serial clock cycle time tSCYC Internal shift clock opera tion CL 80pF 1TTL 5 tcp ns SCK SOT delay time tSHOVI 50 50 ns SIN SCK setup time tIVSLI tcp 80 ns SCK SIN hold time tSLIXI 0...

Page 51: ...l clock operation CL 80pF 1TTL 5 tcp ns SCK SOT delay time tSLOVI 50 50 ns SIN SCK setup time tIVSHI tcp 80 ns SCK SIN hold time tSHIXI 0 ns SOT SCK delay time tSOVHI 3 tcp 70 ns Parameter Symbol Pin...

Page 52: ...lock Timing 11 4 7 Timer Related Resource Output Timing Parameter Symbol Pin name Condition Value Unit Min Max Input pulse width tTIWH TIN2 TIN3 IN0 to IN3 4 tCP ns tTIWL Parameter Symbol Pin name Con...

Page 53: ...Remarks Min Typ Max CAN PLL cycle jitter When locked tPJ 10 10 ns FCP 16 MHz 4 MHz multiplied by 4 24 MHz 4 MHz multiplied by 6 32 MHz 4 MHz multiplied by 8 t1 t2 t3 t1 t2 t3 tn 1 tn tn 1 tn CAN PLL c...

Page 54: ...tage VOT AN0 to AN15 AVSS 1 5LSB AVSS 0 5LSB AVSS 2 5LSB V Full scale reading voltage VFST AN0 to AN15 AVR 3 5LSB AVR 1 5LSB AVR 0 5LSB V Compare time 0 66 16500 s 4 5 V AVCC 5 5 V 2 2 3 0 V AVCC 4 5...

Page 55: ...dard consider the relationship between the external impedance and minimum sampling time and either adjust the resistor value and operating frequency or decrease the external impedance so that the samp...

Page 56: ...B from an ideal value Total error Difference between an actual value and an theoretical value A total error includes zero transition error full scale transition error and linear error 3FFH 3FEH 3FDH 0...

Page 57: ...tics Actual conversion characteristics Ideal characteristics Digital output Digital output Analog input Analog input VNT actual measurement value V N 1 T actual measurement value Non linearity error D...

Page 58: ...mpling time s External impedance k Minimum sampling time s External impedance k MB90911AS MB90F912BS 100 90 80 70 60 50 40 30 20 10 0 0 5 10 1 2 3 4 6 7 8 9 MB90V950AMAS MB90911AS MB90F912BS 20 18 16...

Page 59: ...ts into normalized value at 85 C Parameter Conditions Value Unit Remarks Min Typ Max Sector erase time TA 25 C VCC 5 0 V 0 9 3 6 s Excludes programming prior to erasure Chip erase time 5 4 21 6 s Byte...

Page 60: ...04578 Rev A Page 60 of 64 MB90910 Series 12 Ordering Information Part number Package Remarks MB90F912BSPMC 48 pin plastic LQFP FPT 48P M26 MB90911ASPMC MB90V950AMASCR ES 299 pin ceramic PGA PGA 299C...

Page 61: ...25 48 37 INDEX SQ 9 00 0 20 354 008 SQ 0 145 0 055 006 002 0 08 003 A 0 8 059 004 008 0 10 0 20 1 50 0 60 0 15 024 006 0 10 0 10 004 004 Stand off 0 25 010 Details of A part 1 12 0 08 003 M 008 002 0...

Page 62: ...g external clock Block Diagrams MB90V950AMAS Corrected for the prescaler 5 channels 7 channels Electrical Characteristics DC Characteristics Input H voltage Corrected the pin VIHS P50 P82 P85 Correcte...

Page 63: ...0 V AVCC 3 0 V AVCC 4 5 V Changed the value of Analog port input current Min 0 3 3 Max 0 3 3 Ordering Information Changed the part number MB90F912ASPMC MB90F912BSPMC MB90V950MASCR ES MB90V950AMASCR ES...

Page 64: ...tion or programming code is provided only for reference purposes It is the responsibility of the user of this document to properly design program and test the functionality and safety of any applicati...

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