Document Number: 002-04578 Rev. *A
Page 29 of 64
MB90910 Series
9. CAN Controllers
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Conforms to CAN Specification Ver 2.0 Part A and Part B
❐
Supports transmission/reception in standard frame and extended frame formats
■
Supports transmitting of data frames by receiving remote frames
■
16 transmitting/receiving message buffers
❐
29-bit ID and 8-byte data
❐
Multi-level message buffer configuration
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Provides full-bit comparison, full-bit mask, acceptance register 0/acceptance register 1 for each message buffer as ID acceptance
mask
❐
2 acceptance mask registers in either standard frame format or extended frame formats
■
Bit rate programmable from 10 kbps/s to 1 Mbps/s (when input clock is at 16 MHz)
List of Control Registers (1)
Address
Register
Abbreviation
Access
Initial Value
CAN1
000080
H
Message buffer valid register
BVALR
R/W
00000000 00000000
B
000081
H
000082
H
Transmit request register
TREQR
R/W
00000000 00000000
B
000083
H
000084
H
Transmit cancel register
TCANR
W
00000000 00000000
B
000085
H
000086
H
Transmission complete register
TCR
R/W
00000000 00000000
B
000087
H
000088
H
Receive complete register
RCR
R/W
00000000 00000000
B
000089
H
00008A
H
Remote request receiving
register
RRTRR
R/W
00000000 00000000
B
00008B
H
00008C
H
Receive overrun register
ROVRR
R/W
00000000 00000000
B
00008D
H
00008E
H
Reception interrupt enable
register
RIER
R/W
00000000 00000000
B
00008F
H