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2016
congatec
AG
TR33m10
62/105
Signal
Pin # Description
I/O
PU/PD Comment
DP
DP2_LANE0-
D39
D40
Uni-directional main link for the transport of isochronous streams and
secondary data.
Multiplexed with DDI and DDI1_PAIR0-
O PCIE
DP2_HPD
D44
Detection of Hot Plug / Unplug and notification of the link layer.
Multiplexed with DDI2_HPD.
I 3.3V
PD 100K
C32
Half-duplex bi-directional AUX channel for services such as link
configuration or maintenance and EDID access.
I/O PCIE PD 100K
DP2_AUX-
C33
Half-duplex bi-directional AUX channel for services such as link
configuration or maintenance and EDID access.
I/O PCIE PU 100K
3.3V
DP
DP3_LANE3-
C49
C50
Uni-directional main link for the transport of isochronous streams and
secondary data.
Multiplexed with DDI and DDI3_PAIR3-.
O PCIE
Not supported by default.
DP
DP3_LANE2-
C46
C47
Uni-directional main link for the transport of isochronous streams and
secondary data.
Multiplexed with DDI and DDI3_PAIR2-.
O PCIE
Not supported by default.
DP
DP3_LANE1-
C42
C43
Uni-directional main link for the transport of isochronous streams and
secondary data.
Multiplexed with DDI and DDI3_PAIR1-.
O PCIE
Not supported by default.
DP
DP3_LANE0-
C39
C40
Uni-directional main link for the transport of isochronous streams and
secondary data.
Multiplexed with DDI and DDI3_PAIR0-.
O PCIE
Not supported by default.
DP3_HPD
C44
Detection of Hot Plug / Unplug and notification of the link layer.
Multiplexed with DDI3_HPD.
I 3.3V
PD 100K
Not supported by default.
C36
Half-duplex bi-directional AUX channel for services such as link
configuration or maintenance and EDID access.
I/O PCIE PD 100k
DP3_AUX-
C37
Half-duplex bi-directional AUX channel for services such as link
configuration or maintenance and EDID access.
I/O PCIE PU 100k
3.3V
Table 34
Module Type Definition Signal Description
