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Congatec COM Express conga-TR3, User Manual

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Copyright 

© 

2016 

congatec 

AG 

 

      TR33m10 

 

      

66/105

10 

System Resources

10.1 

I/O Address Assignment

The I/O address assignment of the conga-TR3 module is functionally identical with a standard PC/AT. 

 

Note

The BIOS assigns PCI and PCI Express I/O resources from FFF0h downwards. Non PnP/PCI/PCI Express compliant devices must not consume 

I/O resources in that area.

10.1.1 

LPC Bus

On the conga-TR3, the PCIExpress Bus acts as the subtractive decoding agent. All I/O cycles that are not positively decoded are forwarded 
to the PCIExpress Bus not the LPC Bus. Only specified I/O ranges are forwarded to the LPC Bus. On the conga-TR3 the following I/O address 
ranges are sent to the LPC Bus:

Table 37  

I/O address ranges to LPC Bus

ParallelPort0 378h-37Fh
ParallelPort1 778h-77Fh
ParallelPort2 278h-27Fh
ParallelPort3 678h-67Fh
ParallelPort4 3BCh-3BFh
ParallelPort5 7BCh-7BFh

SerialPort0 3F8h-3FFh
SerialPort1 2F8h-2FFh
SerialPort2 220h-227h
SerialPort3 228h-22Fh
SerialPort4 238h-23Fh
SerialPort5 2E8h-2EFh
SerialPort6 338h-33Fh
SerialPort7 3E8h-3EFh

Summary of Contents for COM Express conga-TR3

Page 1: ...Copyright 2016 congatec AG TR33m10 1 105 COM Express conga TR3 3rd Generation AMD Embedded R Series SoC User s Guide Revision 1 0...

Page 2: ...ary release 0 2 2016 03 22 AEM Updated the whole document 1 0 2016 07 26 BEU Updated form factors in section 1 Introduction Updated section 2 5 Power Consumption 2 7 Environmental Specifications and 4...

Page 3: ...indirectly from any technical or typographical errors or omissions contained herein or for discrepancies between the product and the user s guide In no event shall congatec AG be liable for any incid...

Page 4: ...ngatec AG All rights reserved All text pictures and graphics are protected by copyrights No copying is permitted without written permission from congatec AG congatec AG has made every attempt to ensur...

Page 5: ...non conforming product freight prepaid congatec AG will pay for transporting the repaired or exchanged product to the customer Repaired replaced or exchanged product will be warranted for the repair w...

Page 6: ...quire assistance after visiting our website then contact our technical support department by email at support congatec com Terminology Term Description GB Gigabyte 1 073 741 824 bytes GHz Gigahertz on...

Page 7: ...ector Rows A and B 26 6 1 1 Serial ATA SATA 26 6 1 2 USB 2 0 26 6 1 3 High Definition Audio HDA Interface 26 6 1 4 Gigabit Ethernet 27 6 1 5 LPC Bus 27 6 1 6 I C Bus Fast Mode 27 6 1 7 PCI Express 28...

Page 8: ...ubmenu 81 11 3 8 RTC Wake Submenu 81 11 3 9 Memory Submenu 82 11 3 10 Chipset Submenu 82 11 3 11 SATA Submenu 83 11 3 12 ACPI Submenu 83 11 3 13 Super I O Submenu 84 11 3 14 Serial Port Console Redire...

Page 9: ...tions 48 Table 20 LVDS Signal Descriptions 49 Table 21 SPI BIOS Flash Interface Signal Descriptions 50 Table 22 Miscellaneous Signal Descriptions 50 Table 23 General Purpose I O Signal Descriptions 51...

Page 10: ...n no Super I O PS 2 keyboard and mouse and provide most of the functional requirements for any application These functions include but are not limited to a rich complement of contemporary high bandwid...

Page 11: ...Embedded RX 216GD CPU Freq 2 1 3 4 GHz Quad Core 1 8 3 2 GHz Quad Core 1 6 3 0 GHz Dual Core L2 Shared Cache 2 MB 2 MB 1 MB Memory DDR4 2133 MT s dual channel 2133 MT s dual channel 1600 MT s dual ch...

Page 12: ...EDID 1 3 Resolution up to 1920x1200 in dual channel LVDS mode Optional eDP interface assembly option NOTE Either eDP or LVDS signals supported Both not supported 1 PEG Gen 3 port x8 lanes for external...

Page 13: ...ote To improve the graphic performance of conga TR3 after installing Microsoft Windows Operating System congatec AG recommends the installation of AMD catalyst driver 2 3 Mechanical Dimensions 95 0 mm...

Page 14: ...Input Range Volts Derated Input Volts Max Input Ripple 10Hz to 20MHz mV Max Module Input Power w derated input Watts Assumed Conversion Efficiency Max Load Power Watts VCC_12V 12 12 11 4 12 6 11 4 10...

Page 15: ...n System State Description S0 Minimum value COM set to lowest frequency mode LFM with minimum core voltage during desktop idle The CPU was stressed to its maximum frequency in this S state S0 Maximum...

Page 16: ...on TR3R016 Max Turbo Frequency 3 2GHz Memory Size 2x 4GB Operating System Windows 7 64 bit Power State S0 Min S0 Max S0 Peak S3 S5 Power consumption 0 24 A 2 85 W 4 33 A 51 93 W 8 6 A 103 2 W 0 08 A 0...

Page 17: ...are supplied with 12V power Power consumption results will vary depending on the workload of other components such as graphics engine memory etc 2 6 Supply Voltage Battery Power 2 3V 3 5V DC Typical...

Page 18: ...o 80 C Humidity Operation 10 to 90 Storage 5 to 95 Caution The above operating temperatures must be strictly adhered to at all times When using a congatec heatspreader the maximum operating temperatur...

Page 19: ...MPEG 2 MVC H 265 H 264 Multimedia Features MJPEG Platform Security AES RSA SHA TRNG PCIe Port 6 7 Connector 220 pos Ethernet COM Express AB PCIe GBE congatec Board Controller MUX Optional TPM Intel i...

Page 20: ...e cooling solution CSA Passive cooling solution CSP Heatspreader The dimensions of the cooling solutions are shown below and all measurements are in millimeters The maximum torque specification for he...

Page 21: ...Copyright 2016 congatec AG TR33m10 21 105 4 2 CSP Dimensions...

Page 22: ...igned as a thermal interface between the module and the application specific thermal solution The application specific thermal solution may use heatsinks with fans and or heat pipes which can be attac...

Page 23: ...unting holes on the cooling solution to attach it to the module Apply thread locking fluid on the screws if the cooling solution is used in a high shock and or vibration environment To prevent the sta...

Page 24: ...board the conga TR3 is a sensor that measures the temperature of the board The board sensor is located at the top of the conga TR3 and is defined in CGOS API as CGOS_TEMP_BOARD The sensor positions ar...

Page 25: ...ted via a x1 PCI Express Link LPC Bus I C Bus Fast Mode 3 PCI Express Ports ExpressCard LVDS Connected via DisplayPort 0 Power Control Power Management GPIOs SDIO Fan Control C D DDI Supporting 2 Dual...

Page 26: ...2 0 The conga TR3 offers eight USB 2 0 ports on the A B connector rows Four of the USB 2 0 ports can be combined with USB SuperSpeed signals to create USB 3 0 ports The USB 2 0 ports support USB 1 1...

Page 27: ...and GBE0_LINK1000 signals on the conga TR3 6 1 5 LPC Bus conga TR3 offers the Low Pin Count LPC bus via the integrated controller hub The LPC bus corresponds approximately to a serialized ISA bus yet...

Page 28: ...r each ExpressCard used 6 1 9 VGA The conga TR3 does not support VGA interface 6 1 10 LVDS The conga TR3 offers an LVDS interface on the A B connector The single dual channel LVDS interface is provide...

Page 29: ...support up to 1MBit s and can operate in low speed full speed and high speed modes The UART interfaces are routed to the AB connector and require congatec driver to function Note The UART interfaces...

Page 30: ...R_OK is driven by carrier board hardware The three typical usage scenarios for a carrier board design are Connect PWR_OK to the power good signal of an ATX type power supply Connect PWR_OK to the last...

Page 31: ...settings or by system software Power Supply Implementation Guidelines 12 volt input power is the sole operational power source for the conga TR3 The remaining necessary voltages are internally generat...

Page 32: ...TN3360D should be implemented on the user s carrier board The conga TR3 can support a third DDI interface on the C D connector but only as an assembly option customized variant The customized variant...

Page 33: ...DTS HD Master Audio Note Customized variants equipped with the third DDI interface optional DDI interface support only two independent HDMI DVI displays To support the HDMI interface an external level...

Page 34: ...nctions to further improve system management One of these signals is an output signal called FAN_PWMOUT that allows system fan control using a PWM Pulse Width Modulation output Additionally there is a...

Page 35: ...CGUTLm1x pdf on the congatec website at www congatec com or contact technical support The customization features supported are described below 7 2 1 OEM Default Settings This feature allows system de...

Page 36: ...7 2 5 OEM DXE Driver This feature allows designers to add their own UEFI DXE driver to the congatec embedded BIOS Contact congatec technical support for more information on how to add an OEM DXE drive...

Page 37: ...Win32 Win64 Win CE Linux The architecture of the CGOS API driver provides the ability to write application software that runs unmodified on all congatec CPU modules All the hardware related code is c...

Page 38: ...rovides hardware support for Advanced Host Controller Interface AHCI a new programming interface for SATA host controllers Platforms supporting AHCI may take advantage of performance features such as...

Page 39: ...power policy AMD Turbo CORE technology 3 0 with per core power gating For more information about AMD64 Technology visit http www amd com 8 2 3 AMD Virtualization Technology SVM pause count capability...

Page 40: ...on off Although active cooling devices consume power and produce noise they also have the ability to cool the thermal zone without having to reduce the overall system performance Use the active cooli...

Page 41: ...LAN support SMBALERT Wakes unconditionally from S3 S5 PCI Express WAKE Wakes unconditionally from S3 S5 WAKE Wakes uncondionally from S3 PME Activate the wake up capabilities of a PCI device using Wi...

Page 42: ...am Port 0 HUB 0 1 EHCI Routing Mux xHCI FP4 USB Controller Port 1 Port 2 Port 3 Port 4 SS 0 SS 1 SS 2 SS 3 Port 5 Port 6 Port 7 COM Express Connector USB 2 0 Port4 USB 2 0 Port5 USB 2 0 Port6 USB 2 0...

Page 43: ...t present the signal is asserted when at a high voltage level Table 11 Signal Tables Terminology Descriptions Term Description I Input Pin O Output Pin OC Open Collector OD Open Drain PU Implemented p...

Page 44: ..._SDIN 2 0 B28 B30 High Definition Audio Serial Data In 0 These signals are serial TDM data inputs from the three codecs The serial input is single pumped for a bit rate of 24 Mb s for High Definition...

Page 45: ...Ethernet channel 0 magnetics center tap The reference voltage is determined by the requirements of the module PHY and may be as low as 0V and as high as 3 3V The reference voltage output shall be cur...

Page 46: ...mit Output differential pair O SATA Supports Serial ATA specification Revision 3 0 SATA1_RX SATA1_RX B19 B20 Serial ATA channel 1 Receive Input differential pair I SATA Supports Serial ATA specificati...

Page 47: ...se Specification Revision 3 0 PCIE_RX3 PCIE_RX3 B58 B59 PCI Express channel 3 Receive Input differential pair I PCIE Not connected by default PCIE_TX3 PCIE_TX3 A58 A59 PCI Express channel 3 Transmit O...

Page 48: ...t Backwards compatible to USB 1 1 USB4 A39 USB Port 4 data or D I O USB 2 0 compliant Backwards compatible to USB 1 1 USB5 B40 USB Port 5 data or D I O USB 2 0 compliant Backwards compatible to USB 1...

Page 49: ...72 A73 A74 A75 A76 A78 A79 LVDS Channel A differential pairs O LVDS LVDS_A_CK LVDS_A_CK A81 A82 LVDS Channel A differential clock O LVDS LVDS_B0 LVDS_B0 LVDS_B1 LVDS_B1 LVDS_B2 LVDS_B2 LVDS_B3 LVDS_B3...

Page 50: ...port clock output input I OD 3 3V PU 2 2K 3 3VSB I2C_DAT B34 General purpose I C port data I O line I OD 3 3V PU 2 2K 3 3VSB SPKR B32 Output for audio enunciator the speaker in PC AT systems O 3 3V W...

Page 51: ...tion I O PU PD Comment PWRBTN B12 Power button to bring system out of S5 soft off active on rising edge I 3 3VSB PU 10K 3 3VSB SYS_RESET B49 Reset button input Active low input Edge triggered System w...

Page 52: ...3V PU 47K 3 3VSB Table 25 Serial UART Interface Signal Descriptions Signal Pin Description I O PU PD Comment SER0_TX A98 General purpose serial port transmitter O 3 3V Signal is driven to logic 1 only...

Page 53: ...17 SATA0_TX B17 SATA1_TX A72 eDP_TX2 LVDS_A0 B72 LVDS_B0 A18 SUS_S4 B18 SUS_STAT A73 eDP_TX1 LVDS_A1 B73 LVDS_B1 A19 SATA0_RX B19 SATA1_RX A74 eDP_TX1 LVDS_A1 B74 LVDS_B1 A20 SATA0_RX B20 SATA1_RX A75...

Page 54: ...A45 USB0 B45 USB1 A100 GND FIXED B100 GND FIXED A46 USB0 B46 USB1 A101 SER1_TX B101 FAN_PWMOUT A47 VCC_RTC B47 EXCD1_PERST A102 SER1_RX B102 FAN_TACHIN A48 EXCD0_PERST B48 EXCD1_CPPE A103 LID B103 SLE...

Page 55: ...SRX0 C4 Additional receive signal differential pairs for the Superspeed USB data path I USB_SSRX0 C3 I USB_SSTX0 D4 Additional transmit signal differential pairs for the Superspeed USB data path O USB...

Page 56: ...EG_RX5 PEG_RX5 PEG_RX6 PEG_RX6 PEG_RX7 PEG_RX7 PEG_RX8 PEG_RX8 PEG_RX9 PEG_RX9 PEG_RX10 PEG_RX10 PEG_RX11 PEG_RX11 PEG_RX12 PEG_RX12 PEG_RX13 PEG_RX13 PEG_RX14 PEG_RX14 PEG_RX15 PEG_RX15 C52 C53 C55 C...

Page 57: ...2 PEG_TX12 PEG_TX13 PEG_TX13 PEG_TX14 PEG_TX14 PEG_TX15 PEG_TX15 D52 D53 D55 D56 D58 D59 D61 D62 D65 D66 D68 D69 D71 D72 D74 D75 D78 D79 D81 D82 D85 D86 D88 D89 D91 D92 D94 D95 D98 D99 D101 D102 PCI E...

Page 58: ..._CTRLDATA_AUX D16 Multiplexed with SDVO1_CTRLDATA DP1_AUX and HDMI1_CTRLDATA DP AUX function if DDI1_DDC_AUX_SEL is no connect HDMI DVI I2C CTRLDATA if DDI1_DDC_AUX_SEL is pulled high I O PCIE I OD 3...

Page 59: ...Not supported by default DDI3_CTRLCLK_AUX C36 Multiplexed with DP3_AUX and HDMI3_CTRLCLK DP AUX function if DDI3_DDC_AUX_SEL is no connect HDMI DVI I2C CTRLCLK if DDI3_DDC_AUX_SEL is pulled high I O P...

Page 60: ..._DATA1 D42 D43 HDMI DVI TMDS differential pair Multiplexed with DDI2_PAIR1 and DDI2_PAIR1 O PCIE TMDS2_DATA2 TMDS2_DATA2 D39 D40 HDMI DVI TMDS differential pair Multiplexed with DDI2_PAIR0 and DDI2_PA...

Page 61: ...for the transport of isochronous streams and secondary data Multiplexed with DDI1_PAIR1 and DDI1_PAIR1 O PCIE DP1_LANE0 DP1_LANE0 D26 D27 Uni directional main link for the transport of isochronous st...

Page 62: ..._LANE2 DP3_LANE2 C46 C47 Uni directional main link for the transport of isochronous streams and secondary data Multiplexed with DDI3_PAIR2 and DDI3_PAIR2 O PCIE Not supported by default DP3_LANE1 DP3_...

Page 63: ...a fault indicator such as an LED TYPE10 A97 Dual use pin Indicates to the carrier board that a Type 10 module is installed Indicates to the carrier that a Rev 1 0 2 0 module is installed PDS Not conn...

Page 64: ...D C16 DDI1_PAIR6 D16 DDI1_CTRLDATA_AUX C71 PEG_RX6 D71 PEG_TX6 C17 RSVD D17 RSVD C72 PEG_RX6 D72 PEG_TX6 C18 RSVD D18 RSVD C73 GND D73 GND C19 PCIE_RX6 D19 PCIE_TX6 C74 PEG_RX7 D74 PEG_TX7 C20 PCIE_RX...

Page 65: ...9 PEG_RX14 D99 PEG_TX14 C45 RSVD D45 RSVD C100 GND FIXED D100 GND FIXED C46 DDI3_PAIR2 D46 DDI2_PAIR2 C101 PEG_RX15 D101 PEG_TX15 C47 DDI3_PAIR2 D47 DDI2_PAIR2 C102 PEG_RX15 D102 PEG_TX15 C48 RSVD D48...

Page 66: ...subtractive decoding agent All I O cycles that are not positively decoded are forwarded to the PCIExpress Bus not the LPC Bus Only specified I O ranges are forwarded to the LPC Bus On the conga TR3 t...

Page 67: ...is subject contact congatec technical support for assistance 10 2 PCI Configuration Space Map Table 38 PCI Configuration Space Map Bus Number hex Device Number hex Function Number hex PCI Interrupt Ro...

Page 68: ...3 00h 00h Internal Onboard Gigabit LAN Controller 02h see Note 3 00h 00h Internal PCI Express Port 0 03h see Note 3 00h 00h Internal PCI Express Port 1 04h see Note 3 00h 00h Internal PCI Express Port...

Page 69: ...51 E 44 F 45 G 46 H 47 Table 40 PCI Interrupt Routing Map 2 PIRQ PCI EX Root Bridge 0 PCI EX Root Bridge 1 PCI EX Root Bridge 2 PCI EX Root Bridge 3 PCI EX Root Bridge 4 PEG Root Bridge 0 PEG Root Br...

Page 70: ...s Address 16h is reserved for congatec Battery Management solutions 10 5 SM Bus System Management SM bus signals are connected to the AMD Chipset and the SM bus is not intended to be used by off board...

Page 71: ...rator to select either the boot device that should be used or an option to enter the BIOS setup program 11 2 Setup Menu and Navigation The congatec BIOS setup screen is composed of the menu bar and tw...

Page 72: ...and board information and is used to configure the system date and time Feature Options Description Main BIOS Version No option Displays the main BIOS version OEM BIOS Version No option Displays the a...

Page 73: ...tting advanced features Main Advanced Boot Security Save Exit Save Exit Graphics Hardware Monitoring Watchdog Module Serial Ports Trusted Platform Module RTC Wake Settings Memory Chipset SATA ACPI Sup...

Page 74: ...resent or not IGD Framebuffer Size 32M 64M 128M 256M 512M 1G Only visible if IGD is set to forced configuration Set fixed graphics framebuffer size for IGD The graphics driver might allocate additiona...

Page 75: ...rackets specifies the congatec internal number of the respective panel data set Note Customized EDID utilizes an OEM defined EDID data set stored in the BIOS flash device Backlight Inverter Type None...

Page 76: ...nterface 1 Display Port or HDMI DVI supported and automatically detected and configured or HDMI DVI mode can be forced DDI2 Interface Disabled Auto Selection Force HDMI DVI Configure the digital displ...

Page 77: ...mum fan speed Default 100 0 100 Fan speed to be set if the temperature is above the upper limit 11 3 4 Watchdog Submenu Feature Options Description POST Watchdog Disabled 30sec 1min 2min 5min 10min 30...

Page 78: ...eout 3 is reached Timeout 1 1sec 2sec 5sec 10sec 30sec 1min 2min 5min 10min 30min Selects the timeout value for the first stage watchdog event Timeout 2 see above Selects the timeout value for the sec...

Page 79: ...338h 3E8h Set serial port base address Interrupt None IRQ3 IRQ4 IRQ5 IRQ6 IRQ10 IRQ11 IRQ14 IRQ15 Set serial port interrupt PNP ID None PNP0501 CGT0501 Set serial port ACPI ID Baudrate 2400 4800 9600...

Page 80: ...e Options Description Security Device Support Disable Enable Enable or disable BIOS support for security device TPM State Disabled Enabled Enable or disable TPM 1 2 chip Note System might restart seve...

Page 81: ...times during POST to perform selected operation Platform Hierarchy Enabled Disabled Enable or disable TPM 2 0 platform hierarchy Storage Hierarchy Enabled Disabled Enable or disable TPM 2 0 storage h...

Page 82: ...mory modules are supporting it Dimm0 No option Size current speed and SPD max speed of DIMM 0 module Dimm1 No option Size current speed and SPD max speed of DIMM 1 module 11 3 10 Chipset Submenu Featu...

Page 83: ...nable or disable SATA port 0 Speed Limit Auto Gen1 Gen2 Select max SATA speed generation for the selected port Auto up to Gen3 ESATA Support Disabled Enabled Enabled or disable ESATA and hotplug AHCI...

Page 84: ...he temperature threshold at which the ACPI aware OS turns the fan on off Passive Trip Point Disabled 60C 70C 80C 90C 95C Specifies the temperature threshold at which the ACPI aware OS starts stops CPU...

Page 85: ...P Mode EPP Mode ECP Mode Set the parallel port mode Note This setup menu is only available if an external Winbond W83627 Super I O has been implemented on the carrier board 11 3 14 Serial Port Console...

Page 86: ...ith recorder mode enabled only text output will be sent over the terminal This is helpful to capture and record terminal data Resolution 100x31 Disabled Enabled Enables or disables extended terminal r...

Page 87: ...led Enabled When enabled a Virtual Machine Manager VMM can utilize the integrated hardware virtualization support C6 Support Disabled Enabled Enable or disable CPU C6 low power state support Core Perf...

Page 88: ...g and interrupt reservation for legacy devices 11 3 16 1 PCI Express Settings Submenu Feature Options Description Relaxed Ordering Disabled Enabled Enable or disable PCI Express device relaxed orderin...

Page 89: ...em on Restore PCIE Registers Enabled Disabled On non PCI Express aware operating systems some devices may not be re initialized correctly after S3 Setting this node to Enabled restores PCI Express con...

Page 90: ...ed determined by PCIe device GenX force GenX speed ASPM Mode Control Disabled L0s Entry L1 Entry L0s And L1 Entry Select ASPM mode for current PCIe port Hotplug Mode Control Disabled Enabled Enable or...

Page 91: ...termined by PCIe device GenX force GenX speed ASPM Mode Control Disabled L0s Entry L1 Entry L0s And L1 Entry Select ASPM mode for current PCIe port Hotplug Mode Control Disabled Enabled Enable or disa...

Page 92: ...le the UEFI network stack IPv4 PXE Support Disabled Enabled Enable IPv4 PXE boot support If disabled IPv4 PXE boot option will not be created IPv6 PXE Support Disabled Enabled Enable IPv6 PXE boot sup...

Page 93: ...cy Do Not Launch UEFI ROM Only Legacy ROM Only Controls the execution of UEFI and legacy mass storage device option ROMs Video Option ROM Launch Policy Do Not Launch UEFI ROM Only Legacy ROM Only Cont...

Page 94: ...rts Submenu Configure USB ports and controllers Legacy USB Support Enabled Disabled Auto Enables legacy USB support Auto option disables legacy support if no USB devices are connected Disable option w...

Page 95: ...n type setup option This option specifies the type of emulation the BIOS has to provide for the device Note The device s formatted type and the emulation type provided by the BIOS must match for the d...

Page 96: ...bug port 11 3 23 Diagnostic Settings Submenu Feature Options Description Relay Interface Disabled I2C SMBus BC Diagnostic Console Select post code redirection relay interface used for debugging Primar...

Page 97: ...evice Debug Beeps Disabled Enabled Enable or disable output device debug beeps USB Driver Beeps Disabled Enabled Enable or disable USB driver beeps 11 3 25 Intel I211 Gigabit Network Connection Submen...

Page 98: ...ed on using an in band magic packet 11 4 Security Setup Select the Security tab from the setup menu to enter the Security setup screen 11 4 1 Security Settings Feature Options Description BIOS Passwor...

Page 99: ...update and write protection the system configuration is completely secured If the BIOS is password protected you cannot change the configuration of an end application without the correct password Note...

Page 100: ...ssword A locked drive will be detected by the system but no data can be accessed Accessing data on a locked drive requires the proper password to unlock the disk The BIOS enables users to enable disab...

Page 101: ...can be prioritized if UEFI Standard priority list control is selected If Type Based priority list control is enabled only 8 boot devices can be prioritized Disabled SATA 0 Drive SATA 1 Drive NVMe Stor...

Page 102: ...n will be skipped Redirection Support Disabled Enabled If set to Disabled console redirection driver installation will be skipped UEFI Screenshot Driver Disabled Enabled Enable or disable UEFI screens...

Page 103: ...the setup options Stay in setup menu Discard Changes Discard changes made so far to any of the setup options Stay in setup menu Restore Defaults Restore default values for all the setup options Gener...

Page 104: ...nor revision number The conga TR3 BIOS binary size is 8 MB 12 1 Supported Flash Devices The conga TR3 supports the following flash devices Spansion S25FL064K0SMFI01 8 MB Winbond W25Q64CVSSIG 8 MB Winb...

Page 105: ...Revision 1 0 LPC http developer intel com design chipsets industry lpc htm Universal Serial Bus USB Specification Revision 2 0 http www usb org home PCI Specification Revision 2 3 http www pcisig com...

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