11.2.14 Test 25: Local RAM Dual Address Test
This BIST checks for Dual Addressing in the RAM. The range of memory to be tested depends
upon the test handler from which the BIST was invoked.
When the test is executed from the slave test handler, e.g. during soak testing, the test range is
limited to 64 Mbytes; however, each time the BIST is executed it tests a different block.
Therefore, over the duration of a soak-test run the whole of memory will be tested a number of
times, but the overall test coverage will be improved for large memory capacity boards.
When the test is executed from the master test handler, the test range is from 1 Mbyte to the top
of fitted memory. However, BIST parameters can be used to specify a different test range. Note
that the video memory hole between A0000h and BFFFFh must be avoided.
The BIST proceeds to write the memory address, rotated two bit positions, to each Dword
location. When the whole test region has been written, the memory is read back and compared
against the expected value. By using the memory address as test data, any incorrect values will
identify the dual-addressed memory location.
During the test, the PCI Bus Error interrupts are enabled. If one of these should occur, the test is
aborted and a diagnostic message displayed.
To reduce execution time this BIST runs from DRAM; however, the area of memory from which
the test code executes is first tested by the ROM-based version of the routine.
Error codes:
0300h - Test failed; associated message gives details
0402h - PCI bus error occurred
0403h - PSB Error occurred
11.2.15 Test 27: Local RAM Execution Test
This BIST executes code from RAM in the selected test region. The range of memory to be
tested depends upon the test handler from which the BIST was invoked.
When the test is executed from the slave test handler, e.g. during soak testing, the test range is
limited to 64 Mbytes; however, each time the BIST is executed it tests a different block.
Therefore, over the duration of a soak-test run the whole of memory will be tested a number of
times, but the overall test coverage will be improved for large memory capacity boards.
When the test is executed from the master test handler, the test range is from 1 Mbyte to the top
of fitted memory. However, BIST parameters can be used to specify a different test range. Note
that the video memory hole between A0000h and BFFFFh must be avoided.
This test copies a small string of code into the selected RAM area and executes out of that RAM.
The buffer is first filled with INT3 opcodes, and then the sequence of instructions is copied to the
beginning of the buffer. A jump is made to the code, which copies itself to the next available
location in the buffer, then overwrites the old copy with INT3 instructions once more. If an error
occurs such that it the code jumps into a location outside the instruction sequence, this is
trapped via the INT3 instructions.
When the test code reaches the end of the buffer, it returns to the caller and the test has passed.
During the test, the PCI Bus Error interrupts are enabled. If one of these should occur, the test is
aborted and a diagnostic message displayed.
Error codes:
0300h - Test failed: for details see accompanying message
0402h - PCI bus error occurred
0403h - PSB Error occurred
11-6
VP 110/01x
VSA Mode Diagnostics
Summary of Contents for VP 110/01 Series
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