2 - 61
CHAPTER 2
The following is a block diagram of the video controller circuit:
Expansion
RAM (option)
<J4>
Expansion
ROM (option)
<J1/J2/J3>
Built-in
DRAM
8MB
Built-in ROM
CPU
X'TAL3
12MHz
X'TAL2
9.4MHz
X'TAL1
66MHz
EEPROM
ASIC
Video
controller
interface
USB interface
Centronics
interface
HDD/expansion
interface
Expansion
interface
DC
controller
Control
panel
External
device
External
device
Expansion
interface
(option)
HDD
interface
(option)
<J5>
<J6>
<J7>
<J10>
<J9>
<J8>
Figure 2-6-2
Summary of Contents for LBP-2000
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