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Title:
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Revision:
User's Manual (MUT)
Mod. V1495 General Purpose VME Board
12/02/2010
8
NPO:
Filename:
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Page:
00117/04:V1495.MUTx/08 V1495_REV8.DOC
42
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4.5. Interrupt Status-ID Register
(Base A 0x8006, read/write, D16)
This register contains the STATUS/ID that the V1495 places on the VME data bus during
the Interrupt Acknowledge cycle (Bits 8 to 15 are meaningless). Default setting is 0xDD.
Not implemented in VME FPGA Rev 0.0. Available in next releases
Fig. 4.2: Interrupt Vector Register
4.6. GEO Address Register
(Base A 0x8008, read, D16)
The register content is the following:
Fig. 4.3: Geographical address register
This register allows readback of the level of GEO pins for the selected board. The
register content is valid only for the VME64X board version. The register content for the
VME64 version is 0x1F.
4.7. Module Reset Register
(Base A 0x800A write only, D16)
A dummy access to this register allows to generate a single shot RESET of the module.
4.8. Firmware Revision Register
(Base A 0x800C, read only, D16)
This register contains the firmware revision number coded on 8 bit. For instance, the
REV. 1.2 register content is:
Fig. 4.4: Firmware Revision Register
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
GEO ADDR 0
GEO ADDR 1
GEO ADDR 2
GEO ADDR 3
GEO ADDR 4
STATUS/ID
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
0
0
0
1
0
0
1
0
0x1
0x2
0
0
0
0
0
0
0
0
