CHAPTER 3 THEORY OF OPERATION
3-14
1.3.11 Engine
I/O
The interface with the engine PCB is by full-duplex synchronous serial method, of which
transfer rate is 520kbps.
<HL-5130/5140/5150D>
3D
ENGDI
2D
ENGDI
ENGDI
U5
Aurora
254
ENGRSTN
253
ENGDO
255
R101
4.7k
VDD5
VDD3
R102
4.7k
VDD3
0V
C106
C102
R103
100
C117
C103
C119
C103
C118
C101
C105
C101
R104
1k
R100
100
TP202
TP203
TP200
TP201
TP204
TP205
CN8
1
3.3V
B6B-PH-K-S
2
0V
3
TXD
4
RXD
5
RESET
6
5V
ENGINE
Fig. 3-21
<HL-5170DN>
3D
ENGDI
1D
ENGDI
ENGDI
U7
Aurora
254
ENGRSTN
253
ENGDO
255
R139
4.7k
VDD5
VDD3
R140
4.7k
L11
0
VDD3
0V
C143
C102
R141
100
C152
C103
C154
C103
C153
C101
C142
C101
L10
0
L15
0
L14
0
L12
0
L13
0
R142
1k
R138
100
TP202
TP203
TP200
TP201
TP204
TP205
CN9
1
3.3V
B6B-PH-K-S
2
0V
3
TXD
4
RXD
5
RESET
6
5V
ENGINE
Fig. 3-22
1.3.12 Panel
I/O
The interface with the panel PCB is by full-duplex synchronous serial method.
<HL-5130/5140/5150D>
3D
LED0
3D
LED1
3D
LED2
3E
LED3
3E
LED4
3E
SW0
3E
SW1
C111
C101
C101
C101
C101
C101
C101
C101
C107
0V
L15
BLM18BD102
BLM18BD102
BLM18BD102
BLM18BD102
BLM18BD102
L17
L16
L13
L14
C109
C108
C113
C112
C110
TP210
TP211
CN9
1
SW1
2
LED3
3
LED4
4
LED0/PNLRSTN
5
SW0/PNLDI
6
LED2/PNLDO
7
LED1/PNLCLK
8
GND
B9B-PH-K-S
9
VDD5
VDD3
0V
VDD5
R109
1k
R106
1k
R107
1k
R108
1k
PANEL
LED
1-8 PIN
PANEL
4-9 PIN
LED
2-9 PIN
Fig. 3-23
<HL-5170DN>
3D
LED0
3D
LED1
3D
LED2
3E
LED3
3E
LED4
3E
SW0
3E
SW1
C148
C101
C101
C101
C101
C101
C101
C101
C144
0V
L18
BLM18BD102
BLM18BD102
BLM18BD102
BLM18BD102
BLM18BD102
L20
L19
L16
L17
C146
C145
C150
C149
C147
L21
0
TP210
TP211
CN10
1
SW1
2
LED3
3
LED4
4
LED0/PNLRSTN
5
SW0/PNLDI
6
LED2/PNLDO
7
LED1/PNLCLK
8
GND
B9B-PH-K-S
9
VDD5
VDD3
L22
0
0V
VDD5
R148
1k
R145
1k
R146
1k
R147
1k
PANEL
LED
1-8 PIN
PANEL
4-9 PIN
LED
2-9 PIN
Fig. 3-24