5-14
Setting Pulse Timing Parameters
Pulses are defined by a delay, from their sync or start pulse to the active edge,
and a width.
Wid:
Sets the width of the active portion of the pulse.
Dly:
Sets the delay from the sync source to the start of the pulse.
NOTE: If Wid + Dly + 75 ns (hardware reset time) > T
0
Period, the correct pulse
width will be generated but at a slower rate.
Setting Pulse Output Parameters
There are three basic types of outputs available on the 575: (a) TTL/CMOS
compatible outputs; (b) adjustable amplitude outputs; (c) optical outputs.
Out:
Selects between TTL/CMOS mode and Adjustable mode
when both are available on a single output.
Pol:
Sets the voltage polarity of the pulse, active high or active
low. Note: All outputs are positive - negative voltages are
not supported.
Ampl:
In adjustable mode, it sets the unloaded output voltage. The
actual output voltage will depend on the load impedance. For
example: If the load is 50 ohms, the output will be 50% of the
stated voltage.
Using the Output Multiplexer
Each output channel includes a multiplexer which allows routing any or all of the
timer outputs to the physical output. This allows double pulses and other
com-plex pulse trains to be generated. Only timing parameters are multiplexed
together, not amplitudes.
-HGFEDCBA-
Mux:
-00000101-
The multiplexer is represented by an
“n” bit binary number as shown above. “n” is
the number of channels. Each bit represents a channel timer, which is enabled
by setting the bit to one. In the above example, timers A and C are combined on
the current output.
Setting System Internal Rate Parameters
The internal T
0
period controls the fundamental output frequency of the system.
Each channel may operate at submultiples of the fundamental frequency using
their duty cycle mode.
Source:
Sets the reference source for the internal T Period.
Per:
Sets the internal T Period.