BBK PV420S, Service Manual

Page: 283 / 299

SLUS530D − SEPTEMBER 2002 − REVISED SEPTEMBER 2003
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16
APPLICATION INFORMATION
SELECTING INPUT CAPACITOR
In most applications, all that is needed is a high-frequency decoupling capacitor. A 0.47-
µ
F ceramic, placed in close
proximity to V
CC
and V
SS
pins, works well. The bqTINY is designed to work with both regulated and unregulated
external dc supplies. If a non-regulated supply is chosen, the supply unit should have enough capacitance to hold
up the supply voltage to the minimum required input voltage at maximum load. If not, more capacitance has to be
added to the input of the charger.
SELECTING OUTPUT CAPACITOR
The bqTINY requires only a small output capacitor for loop stability. A 0.1-
µ
F ceramic capacitor placed between the
BAT and ISET pins is typically sufficient for embedded applications (i.e. non-removable battery packs). For
application with removable battery packs a 1-
µ
F ceramic capacitor ensure proper operation of the battery detection
circuitry. Note that the output capacitor can also be placed between BAT and VSS pins.
THERMAL CONSIDERATIONS
The bqTINY is packaged in a thermally enhanced MLP (also referred to as QFN) package. The package includes
a thermal pad to provide an effective thermal contact between the device and the printed circuit board (PCB). Full
PCB design guidelines for this package are provided in the application note entitled, QFN/SON PCB Attachment
Application Note (TI Literature No. SLUA271).
The most common measure of package thermal performance is thermal impedance (
θ
JA
) measured (or modeled)
from the device junction to the air surrounding the package surface (ambient). The mathematical expression for
θ
JA
is:
q
JA
+
T
J
*
T
A
P
Where:
T
J
= device junction temperature
T
A
= ambient temperature
P = device power dissipation
Factors that can greatly influence the measurement and calculation of
θ
JA
include:
whether or not the device is board mounted
trace size, composition, thickness, and geometry
orientation of the device (horizontal or vertical)
volume of the ambient air surrounding the device under test and airflow
whether other surfaces are in close proximity to the device being tested
The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal PowerFET.
It can be calculated from the following equation:
P
+
V
IN
*
V
I(BAT)
I
O(OUT)
Due to the charge profile of Li-xx batteries, the maximum power dissipation is typically seen at the beginning of the
charge cycle when the battery voltage is at it’s lowest. See Figure 2.
(7)
(8)