Automationdirect.com DL05, User Manual

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Appendix C
Inst. Execution
T
imes
C–11
Instruction Execution Times
Timer, Counter, and Shift Register DL05
Instruction Legal Data Types Execute Not Execute
SGCNT 1st 2nd
CT V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit) 76.5
m
s
76.5
m
s
70.8
m
s
106.8
m
s
106.8
m
s
75.3
m
s
75.3
m
s
69.6
m
s
105.4
m
s
105.4
m
s
UDC 1st 2nd
CT V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit) 118.3
m
s
118.3
m
s
111.8
m
s
145.0
m
s
145.0
m
s
101.1
m
s
101.1
m
s
94.6
m
s
128.0
m
s
128.0
m
s
SR C (N points to shift) 43.4
m
s+25.6
m
sxN 31.4
m
s
Accumulator / Stack Load and
Output Data Instructions
DL05
Instruction Legal Data Types Execute Not Execute
LD V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit) 43.7
m
s
43.7
m
s
42.7
m
s
68.7
m
s
68.7
m
s
3.7
m
s
3.7
m
s
3.7
m
s
3.7
m
s
3.7
m
s
LDD V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit) 47.1
m
s
47.1
m
s
42.8
m
s
72.2
m
s
72.2
m
s
3.7
m
s
3.7
m
s
3.7
m
s
3.7
m
s
3.7
m
s
LDF 1st 2nd
X, Y, C, S K:Constant
T, CT, SP (N pt)
65.8
m
s+13.9
m
sxN 4.9
m
s
LDA O: (Octal constant for address) 42.7
m
s 3.7
m
s
OUT V:Data Reg.
V:Bit Reg.
P:Indir. (Data)
P:Indir. (Bit) 16.6
m
s
16.6
m
s
41.8
m
s
41.8
m
s
3.7
m
s
3.7
m
s
3.7
m
s
3.7
m
s
OUTD V:Data Reg.
V:Bit Reg.
P:Indir. (Data)
P:Indir. (Bit) 18.1
m
s
18.1
m
s
43.3
m
s
43.3
m
s
3.8
m
s
3.8
m
s
3.8
m
s
3.8
m
s
OUTF 1st 2nd
X, Y, C K:Constant
(N pt) 61.9
m
s+22
m
sxN 4.7
m
s
POP None 41.1
m
s 2.7
m
s
Accumulator Data
Instructions