Stand-alone Device Programming Using Atmel’s ATDH2200E Configurator Programming System
ATDH2200E Programming Kit User Guide
2-3
1417E–CNFG–4/05
2.3
Using a
Configurator
with Atmel
FPGAs/FPSLIC
®
s
Perform the hardware and software setup as described in paragraphs 2.1 and 2.2.
2.3.1
Programming the
Contents of
a *.BST File to
AT17 Devices
1.
Procedure
➞
Select “/P: Partition, program and verify from an Atmel file”.
2.
Input File
➞
<design>.bst.
3.
Output File
➞
Defaults to <CPS_INSTALL_DIRECTORY>\out.bst or the most
recently used output filename.
4.
Options
➞
Default or previous settings are given. You may need to modify
the following:
– EEPROM Density
➞
Select the device density.
– Reset Polarity
➞
Select the reset polarity.
– FPGA Family
➞
Select “AT40K/AT94K/Cypress” or “AT6K/Other”.
– A2 Bit Level
➞
Select “Low”.
5.
Press “Start Procedure”
2.3.2
Reading the
Contents of the
Configurator to a
*.BST File
1.
Procedure
➞
Select “/R: Read data from device and save to an Atmel file”.
2.
Output File
➞
Defaults to <CPS_INSTALL_DIRECTORY>\out.bst or the most
recently used output filename.
3.
Options
➞
Default or previous settings are given. You may need to modify
the following:
– EEPROM Density
➞
Select the device density.
– FPGA Family
➞
Select “AT40K/AT94K/Cypress” or “AT6K/Other”.
– A2 Bit Level
➞
Select “Low”.
4.
Press “Start Procedure”
2.3.3
Verifying the Device
against a *.BST File
1.
Procedure
➞
Select “/V: Verify device against an Atmel file”.
2.
Input File
➞
<design>.bst.
3.
Options
➞
Default or previous settings are given. You may need to modify
the following:
– EEPROM Density
➞
Select the device density.
– FPGA Family
➞
Select “AT40K/AT94K/Cypress” or “AT6K/Other”.
– A2 Bit Level
➞
Select “Low”.
4.
Press “Start Procedure”
2.3.4
Verifying the Device
Reset Polarity
(AT17LVxx Devices
Only)
1.
Procedure
➞
Select “/X: Verify device reset polarity”.
2.
Options
➞
Default or previous settings are given. You may need to modify
the following:
– Reset Polarity
➞
Select the reset polarity.
3.
Set JP2
to the VERIFY position on the ATDH2200 board.
4.
Press “Start Procedure”
5.
Set JP2
back to the PROGRAM position on the ATDH2200 board.
6.
Press the View Log files button to view reset polarity.
Notes: 1.
If CPS is being launched for the first time, the clock calibration dialog will
appear. Press “Yes” to proceed and select “High” for accurate calibration.
2.
JP1 for Rev. 12 and 13 boards.
Summary of Contents for ATDH2200E
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