In-System Programming (ISP) Using Atmel’s ATDH2200E Configurator Programming System
ATDH2200E Programming Kit User Guide
3-7
1417E–CNFG–4/05
Figure 3-2. Programming Connections
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
Pin 6 is A2 when in programming
mode
VERIFY
PROGRAM
Tri-State BiDir Dat
a
Pin 10 activates "SEREN*" on targey
board
Pin 9 is the polarizing pin (cut
off)
STROBE
ATDH2200 (CHW 5450)
15
FPGA CONFIGUATOR / PROGRAMMER
A
22
Thursday, March 25, 2004
Title
S
iz
e
Document Number
R
e
v
Date:
Sheet
of
CE
RESET_OE
DATA
CLK
SELECT_IN
CLKIN
D0
INIT
DATA
ACK
RESET_OE
CE
DATA
RESET_OE
CE
SEREN
CLK
INIT
GND
GND
D3
GND
SELECT_IN
D1
CLKIN
GND
D0
GND
AUTO_FEED
DATA_IN
GND
D6
D5
SELECT
GND
D2
D4
ACK
GND
BUSY
PE
CLK
VCC
VCC
VCC
VCC
VCC
R4
4.7K
JP2
1
2
3
C3
0.1uF
P1
DB25
13
25
12
24
11
23
10
22
9
21
8
20
7
19
6
18
5
17
4
16
3
15
2
14
1
U1
HARRISCD74LPT244
2
18
4
16
6
14
8
12
11
9
13
7
15
5
17
3
1
20
19
10
1A1
1Y1
1A2
1Y2
1A3
1Y3
1A4
1Y4
2A1
2Y1
2A2
2Y2
2A3
2Y3
2A4
2Y4
1
G
VCC
2
G
GND
U3
AT17LVxx
1
8
2
7
3
6
4
5
DATA
V
C
C
C
L
K
SER_EN*
RESET/OE*
CEO*/A2
CE*
G
N
D
R5
4.7K
U2
IN-CIRCUIT PROGRAMING
1
2
3
4
5
6
7
8
9
10
DATA
C
E
*
C
L
K
RESET/OE*
NC
NC
GND
V
C
C
N
C
GND
C4
.1uF
Summary of Contents for ATDH2200E
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