ADSP-BF526 EZ-Board Evaluation System Manual
I-3
Index
jumpers
diagram of locations,
JP10 (SENSE2 select),
JP11 (RST/ETH LED),
,
JP14 (UART SD),
JP15 (CHG GPIO),
JP16 (OTP flag enable),
JP17 (CHG control),
JP3 (UART1 enable),
,
JP5 (LED enable),
JP6 (mic select),
JP8 (EXP 5V select),
JP9 (VR7 enable),
P11 (VDDEXT power),
,
P12 (VDDMEM power),
P19 (SRAM power),
P21-22 (ETH PWR),
,
P23 (R274 JMP),
P25 (BATT installed),
L
land grid array connectors (P5-7),
,
LED enable jumper (JP5),
,
LEDs
diagram of locations,
LED10 (battery charge),
LED1-2 (Ethernet),
LED3-5 (PF8, PG11-12),
LED4 (USB monitor),
LED7 (reset),
LED8 (batt GD),
LED9 (battery low),
license restrictions,
M
MAC address,
media independent interface (MII),
Media Instruction Set Computing (MISC),
microphone
gain switch (SW9),
,
headphone select (SW10),
,
select jumper (JP6),
,
Micro Signal Architecture (MSA),
N
NAND
NDCE#_HOSTD10 signal,
notation conventions,
O
OTP_FLAG signal,
OTP memory
flag enable jumper (JP16),
P
parallel flash memory,
NAND, flash memory
parallel peripheral interface (PPI),
See
PPI
interface
PF0-7 programmable flags,
PF8 programmable flag,
PF9-15 programmable flags,
PG0-10 programmable flags,
PG11 programmable flag,
PG12 programmable flag,
PG13-15 programmable flags,