System Architecture
2-2
ADSP-BF526 EZ-Board Evaluation System Manual
System Architecture
This section describes the processor’s configuration on the EZ-Board
(
This EZ-Board is designed to demonstrate the capabilities of the
ADSP-BF526 Blackfin processors. The processor has an I/O voltage of
1.8V. The core voltage of the processor is controlled by an Analog Devices
ADP1715 low dropout regulator (LDO) and an Analog Devices AD5258
Figure 2-1. System Architecture
ADSP-BF525
DSP
400 MHz
12mmX12mm/0.5 pitch
LEDs (3)
1.8 Volts
EBIU
JTAG
Po
rt
32.768 KHz
Crystal
3.3 volt
RTC
SPI
64 MB
SDRAM
(32M x 16)
1.8 Volts
High
Density
EBIU
Expansion
Interface
4 MB
Flash
(2M x 16 )
1.8 Volts
25 MHz
Crystal
1.8 Volts
UARTs
PBs (2)
1.8 Volts
RS-232
Female
RS-232
TX/RX
3.3 Volts
SPORT
PPI
MA
C
US
B
Ethernet Phy RMII
1.8 Volts (MAC to Phy)
3.3 Volts (Phy to Mag)
RJ11
TWI
IDC
Conn
IDC
Conn
IDC
Conn
IDC
Conn
USB OTG Conn
3.3 Volts
5 Volts source when
in Host Mode
IDC
Conn
Rotary
1.8 Volts
2 Gb
NAND Flash
(512M x 8 )
1.8 Volts
4 Mb
SPI Boot
Flash
1.8 Volts
HO
ST
PORT
IDC
Conn
NAND
24 MHz
Crystal
3.3 Volts
+3.0
LI-ION
Battery
CLKIN
UP/DN
CNTR
12 MHz
Crystal
1.8 Volts
Power Regulation
1.8 Volt, 3.3 Volt,
2.5 Volt, 5.0 Volt
Li Battery
Charge Circuit
GP
IO
Audio
Codec
1.8 Volts
Mic/
Line
In
Head/
Line
Out
IDC
Conn
Fuel
Gauge