AS7030B/AS7038GB/AS7038RB
AS7030B/AS7038GB/AS7038RB Overview
Eval Kit Manual
• PUBLIC
UG001014
• v1-00 • 2021-May-06
53
│ 18
When triggered from the sequencer, the channel selection is always set to the smallest channel when
the sequencer starts for the first time. When sequencer starts, then stops and starts again, channel
selection will not reset, it will stay at the channel it was on when the sequencer stopped.
When triggered manually, the channel selection resets with every write to one of the channel selection
registers.
After each conversion, the sample goes to the FIFO and the channel selection automatically advances
to the next enabled channel. The current ADC output is also available in the ADC data register, but as
there is no latch mechanism, the data from this register can be inconsistent as the ADC might be
running at the time of ADC data register access.
ADC can trigger an interrupt after conversion has finished.
Figure 16:
ADC Channels
