ADM-PCIE-8V3 User Manual
2 PCB Information
2.1 Physical Specifications
The ADM-PCIE-8V3 complies with PCI Express CEM revision 3.0.
Description
Measure
Total Dy
68.9 mm
Total Dx (Inc. QSFP Cages)
174 mm
Total Dz
17.45 mm
Weight
230 grams
Table 1 : Mechanical Dimensions
2.2 Chassis Requirements
2.2.1 PCI Express
The ADM-PCIE-8V3 is capable of PCIe Gen 1/2/3 with 1/2/4/8/16 lanes, using the Xilinx Integrated Block for PCI
Express.
2.2.2 Mechanical Requirements
A 16-lane physical PCIe slot is required for mechanical compatibility.
Each ADM-PCIE-8V3 is shipped with a full height PCIe card bracket installed by default. A half-height bracket is
shipped along with the product and can be easily changed out with a philips screw driver. If the application
requires a low-profile bracket and the order quantity is high, contact [email protected] to get the correct
bracket fitted before shipping.
2.2.3 Power Requirements
The PCIe Specification permits a standard low-profile, half-length PCIe card to dissipate up to 25 W of power,
drawn from the PCIe slot. The ADM-PCIE-8V3 may consume more than 25 W of power for larger user FPGA
designs. Power estimation requires the use of the Xilinx XPE spreadsheet and/or a power estimator tool
available from Alpha Data. Please contact [email protected] to obtain this tool.
The power available to the rails calculated using XPE are as follows:
Voltage
Source Name
Current Capability
0.95
V VCC VCC_BRAM
36A
1.8
VCC VC VCCO_1.8V
6A
3.3
VCCO_3.3V
6A
1.2
VCCO_1.2V
9A
1.8
MGTVCCAUX
1A
1.0
MGTAVCC
9A
1.2
MGTAVTT
15A
Table 2 : Available Power By Rail
Page 2
PCB Information
ad-ug-1308_v1_9.pdf
