ADM-PCIE-8V3 User Manual
Revision History
Date
Revision
Changed By
Nature of Change
13 Jan 2016
1.0
K. Roth
Initial Release
15 Jan 2016
1.1
K. Roth
Added
GPIO Option
, and
User EEPROM
25 Feb 2016
1.2
K. Roth
Added
FireFly Breakout to Front Panel
and description of
breakout, updated
ADM-PCIE-8V3 Block Diagram
to show
EEPROM, correct FPGA pin N29 net name from FB to LB
as in LTC2870 datasheet, added weight in
Physical
Specifications
, updated configuration flash part number in
Configuration From Flash Memory
23 Mar 2016
1.3
K. Roth
updated
DDR4 SDRAM
to list part numbers and reference
online csv, added note to drive LP_MODE low in section
QSFP28
, Changed reference from ADM-XRC SDK to ADM-
PCIE-8V3 SDK, removed notes on automatic temperature
monitoring.
6 Jun 2016
1.4
K. Roth
Added
Building and Programming Configuration Images
,
Correct clock pin locations in
PCIe Reference Clocks
,
added note to use pullnone in
Clocking
, added note about
SEL pins to
QSFP28
and
FireFly
, updated
Thermal
Performance
to use test results.
22 Aug 2016
1.5
K. Roth
Updated
LEDs
to correct Green LED index reference
mismatch
6 Jan 2017
1.6
K. Roth
Added available power by rail table to
Power Requirements
,
Added section:
Custom Flash Write Interface
, Updated
clock termination recommendation to HSTL_I in
Clocking
,
Added note about PCIe RX equalization options.
1 May 2017
1.7
K. Roth
Scaled thermal performance graph to match innacuracies of
current measurement circuit
Thermal Performance
, updated
Optional Blower
to remove reference to vertical fan,
updated length and part number options in
FireFly
, updated
section
USB Front Panel Interface
to include avr2util
utilization.
21 Jun 2017
1.8
K. Roth
Updated all reference to DDR4 speeds at 16GB to be
2400MT/s and 32GB to be 1866MT/s.
28 Jun 2017
1.9
D. Flint
Updated
Thermal Performance
with data from more
accurate testing.
Page 37
Revision Table
ad-ug-1308_v1_9.pdf
