ADM-PCIE-8V3 User Manual
3 Functional Description
3.1 Overview
The ADM-PCIE-8V3 is a versatile reconfigurable computing platform with a Virtex UltraScale VU095-2E FPGA,
two Gen3x8 PCIe interface, two banks of DDR4 both 72 bits wide (for 64 bits with 8 bits ECC), two QSFP28
cages capable of 8x 28G or 2x 112G Serial IO of any Xilinx supported standard (Ethernet, SRIO, Infiniband,
etc.), two Samtec FireFly connectors also capable of 28G/channel, a U.FL input for a timing synchronization
input, a 12 pin header for general purpose use (clocking, control pins, debug, etc.) and low speed serial
communications, and a robust system monitor.
XCVU095-2
FFVC1517E
(0,4) (5,7) (8,11) (12,15)
x16 PCIe Gen3 Edge
QSFP28 Cage
(4x28 Gbps max)
QSFP28 Cage
(4x28 Gbps max)
DDR4 Bank 1
DDR4-2400/1866, 8/16GB
DDR4 Bank 0
DDR4-2400/1866, 8/16GB
System
Monitor
MGT
MGT
HPIO
HPIO
HRIO
BPI
Config
x72
x72
MGT
MGT
MGT
HRIO
USB
JTAG
0
Auxiliary IO
(gpio, timing,
serial coms, etc)
MGT
FireFly
(4x28Gbps max)
MGT
FireFly
(4x28Gbps max)
MGT
MAC ID
EEPROM
Figure 4 : ADM-PCIE-8V3 Block Diagram
Page 5
Functional Description
ad-ug-1308_v1_9.pdf
