Pike
Technical
Manual
V5.2.3
87
Camera interfaces
Camera
interfaces
Trigger delay
Pike
cameras
feature
various
ways
to
delay
image
capture
based
on
external
trigger.
With
IIDC
V1.31
there
is
a
standard
CSR
at
Register
F0F00534/834h
to
control
a
delay
up
to
FFFh
×
time
base
value.
The
following
table
explains
the
inquiry
register
and
the
meaning
of
the
various
bits.
Note
If
you
set
more
than
1
input
to
function
as
a
trigger
input,
all
trigger
inputs
are
ANDed.
Register
Name
Field
Bit
Description
0xF0F00534
TRIGGER_DELAY_INQUIRY Presence_Inq
[0]
Indicates
presence
of
this
feature
(read
only)
Abs_Control_Inq [1]
Capability
of
control
with
absolute
value
---
[2]
Reserved
One_Push_Inq
[3]
One-push
auto
mode
(controlled
automatically
by
the
camera
once)
Readout_Inq
[4]
Capability
of
reading
out
the
value
of
this
feature
ON_OFF
[5]
Capability
of
switching
this
feature
ON
and
OFF
Auto_Inq
[6]
Auto
mode
(controlled
automatically
by
the
camera)
Manual_Inq
[7]
Manual
mode
(controlled
by
user)
Min_Value
[8
to
19] Minimum
value
for
this
feature
Max_Value
[20
to
31] Maximum
value
for
this
feature
Table 27: Trigger delay inquiry register
