Pike
Technical
Manual
V5.2.3
328
Configuration of the camera
Configuration
of
the
camera
Defect pixel correction
In
the
following
the
abbreviation
DPC
for
D
efect
P
ixel
C
orrection
will
be
used.
To
enable
or
disable
and
configure
defect
pixel
correction
use
the
following
register(s):
Reading or writing defect pixel correction data from/into the camera
Accessing
the
defect
pixel
correction
data
inside
the
camera
is
done
through
the
GPDATA_BUFFER.
Because
the
size
of
the
GPDATA_BUFFER
is
smaller
than
the
whole
defect
pixel
correction
data
the
data
must
be
written
in
multiple
steps.
Defect
pixels
and
columns
are
saved
in
two
adjacent
memory
chunks,
first
the
defect
pixel
chunk
followed
by
defect
columns.
Register
Name
Field
Bit
Description
0xF1000460
DEFECT_PIXEL_CORRECTION_
CTRL
Presence_Inq
[0]
Indicates
presence
of
this
feature
(read
only)
---
[1
to
5]
Reserved
ON_OFF
[6]
Defect
pixel
correction
(DPC)
on/off
---
[7
to
31] Reserved
0xF1000464
DEFECT_PIXEL_CORRECTION_
MEM
Presence_Inq
[0]
Indicates
presence
of
this
feature
(read
only)
---
[1]
Reserved
EnaMemWR
[2]
Enable
WR
access
(from
host
to
µC)
EnaMemRD
[3]
Enable
RD
access
(from
µC
to
host)
---
[4
to
9]
Reserved
Number
DefectColumn
[10
to
17] Number
of
current
defect
columns
(6
byte
/
column)
Number
DefectPixel
[18
to
31] Number
of
current
defect
pixels
(4
byte
/
pixel)
0xF1000468
DEFECT_PIXEL_CORRECTION_
INFO
Presence_Inq
[0]
Indicates
presence
of
this
feature
(read
only)
Version
[1
to
3]
Feature
version
---
[4
to
19] reserved
MaxDPCTable
Size
[20
to
31] Maximum
size
of
DPC
table
(in
128
Byte
Blocks)
Table 194: Advanced register: Defect pixel correction
