Akai 25CT23FSR, Service Manual

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Horizontal and vertical geometry processing
Horizontal and vertical zoom function for 16:9 applications
Horizontal parallelogram and bow correction for large screen picture tubes
Low-power start-up of the horizontal drive circuit
µ-Controller
80C51 µ-controller core standard instruction set and timing
1 µs machine cycle
16 - 128Kx8-bit late programmed ROM
3 - 12Kx8-bit DATA RAM (shared between Display, Acquisition and Auxiliary Ram)
Interrupt controller for individual enable/disable with two level priority
Two 16-bit Timer/Counter registers
One 16 bit Timer with 8-bit Pre-scaler
Watchdog timer
Auxiliary RAM page pointer
16-bit Data pointer
Stand-by, Idle and Power Down (PD) mode
14 bits PWM for Voltage Synthesis Tuning
8-bit A/D converter
4 pins which can be programmed as general I/O pin, ADC input or PWM (6-bit) output
Data Capture
Text memory for 0, 1 or 10 pages
In the 10 page versions inventory of transmitted Teletext pages stored in the Transmitted
Page Table (TPT) and Subtitle Page Table (SPT)
Data Capture for US Closed Caption
Data Capture for 525/625 line WST, VPS (PDC system A) and Wide Screen Signalling
(WSS) bit decoding
Automatic selection between 525 WST/625 WST
Automatic selection between 625 WST/VPS on line 16 of VBI
Real-time capture and decoding for WST Teletext in Hardware, to enable optimized
µ-processor throughput
Automatic detection of FASTEXT transmission
Real-time packet 26 engine in Hardware for processing accented, G2 and G3 characters
Signal quality detector for video and WST/VPS data types
Comprehensive teletext language coverage
Full Field and Vertical Blanking Interval (VBI) data capture of WST data
Display
Teletext and Enhanced OSD modes
Features of level 1.5 WST and US Close Caption
Serial and Parallel Display Attributes
Single/Double/Quadruple Width and Height for characters
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