SERIES AP48X ACROPACK
USER
’S MANUAL
Acromag, Inc. Tel: 248-295-0310
- 44 -
- 44 -
https://www.acromag.com
interrupt will remain pending until released by setting the required bit of
the Interrupt Status/Clear
register.
Table 3.15 Counter Control
Register (Frequency
Measurement)
1. The default state of the
output pin is high (output has
pullup resistor installed). Bit 3
specifies the active output
polarity when the output is
driven.
Bit(s)
FUNCTION
2,1,0
Specifies the Counter Mode:
100
Frequency Measurement
3
Output Polarity (Output Pin ACTIVE Level):
0
Active LOW (Default)
1
1
Active HIGH
5, 4
InA Polarity / Enable Pulse of Known Width
00
Disabled (Default)
01
Active LOW Pulse
10
Active HIGH Pulse
11
Disabled
7, 6
InB Polarity / Signal Measured/Counted
00
Disabled (Default)
01
Active LOW Pulse Counted
10
Active HIGH Pulse Counted
11
Disabled
9,8
InC Polarity / External Trigger
00
Disabled (Default)
01
Active LOW Trigger
10
Active HIGH Trigger
11
Disabled
12,11,10 Specifies the Counter Mode:
111
Frequency Measurement
14 ,13
Not Used (bits read back as 0)
15
Input Debounce Enable
0
Disabled (Default)
–
No Debounce Applied to any
Input.
1
Enabled
–
Reject Gate-Off or Trigger Pulses (noise)
less than or equal to 2.4
s.
