SERIES AP48X ACROPACK
USER
’S MANUAL
Acromag, Inc. Tel: 248-295-0310
- 51 -
http://www.acromag.com
- 51 -
https://www.acromag.com
Counter Interrupt Information Register (Read Only)
This read only register provides information on what type of interrupt has
been generated. This is useful for Quadrature Position Measurement and
Event Counting, as it is possible to have more than one interrupt condition in
these modes. Each bit position is representative of an interrupt condition.
The interrupt conditions for each of the bits can be seen in Table 3.19 below.
A “1” indicates that the interrupt condition represented by that bit has
occurred. The bit will remain a “1” until the pending interrupt is cl
eared by
writing a “1” to the corresponding bit in the Interrupt Pending/Clear Register.
A power-up or system reset clears the Counter Interrupt Information
Register, setting all bits to “0”.
Table 3.19 Counter Interrupt
Information Register
Note that any registers/bits
not mentioned will remain at
the default value logic low.
BIT
FUNCTION
0
Counter equal to value in Counter Constant A Register
(available in Event Counting and Quadrature Position
Measurement)
1
Read Back Register has been loaded by hardware (available
in Event Counting and Quadrature Position Measurement)
2
Index Pulse (available in Quadrature Position Measurement)
3
High to Low or Low to High Transitions (available in Pulse
Width Modulation or One-Shot Pulse Mode)
4
End of Measurement (available in Frequency Measurement,
Input Period Measurement, or Input Pulse Width
Measurement)
5
Time Out (available in Watchdog Timer)
6-31
Not Used
Counter Read Back Register (Read Only)
This read-only register is a dynamic function register that returns the
current value held in the counter. It is updated with the value stored in the
internal counter each time a hardware or software load of the Read Back
Register is implemented.
The internal counter is generally initialized with the value in the Counter
Constant Register, and its value is incremented or decremented according to
the application.
This register must be read using 32-bit accesses.
