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SERIES AP48X ACROPACK
USER
’S MANUAL
Acromag, Inc. Tel: 248-295-0310
- 31 -
http://www.acromag.com
- 31 -
https://www.acromag.com
10-31
Not Used
Counter Stop Register (Write) - (BAR0 + 0x0000 0014)
This register is used to stop the counters of one or a group of
Counter/Timers.
Writing a “1” to the counter’s corresponding stop bit of this
register will cause the counter to be disabled. That is, bits 2, 1, and 0 of the
counter control register are cleared to “000” thus disabling the counter.
Table 3.8 identifies the stop bit location corresponding to each of the
counters. The bits of this register are not stored and merely act to stop the
corresponding counter when set logic high.
Table 3.8 Counter Stop
Register
Note that any registers/bits
not mentioned will remain at
the default value logic low.
BIT
FUNCTION
0
Counter 0 Stop
1
Counter 1 Stop
2
Counter 2 Stop
3
Counter 3 Stop
4
Counter 4 Stop
5
Counter 5 Stop
6
Counter 6 Stop
7
Counter 7 Stop
8
Counter 8 Stop
9
Counter 9 Stop
10-31
Not Used
Load Read Back Register (Write) - (BAR0 + 0x0000 0018)
This register is used to implement software load of the read back register for
all counter/timers. Writing a “1” to the counter’s corresponding load read
back register bit will cause the current count to be loaded into the read back
register. Table 3.9 identifies the load read back register bit corresponding to
each of the counters. The contents of this register are not stored and merely
act to load the read back registers of the corresponding counters.
Other methods are available to load the read back register. At the end of
pulse, period or frequency measurement the read back register is
automatically loaded. With Event Counting a pulse on InA when Control
register bits 5 and 4 are set “11” will load the read back register.
With
Quadrature mode a pulse on InC when the Control register bits 9, 8 and 7 are
set to “111” will load the read back register.