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A96G140/A96G148/A96A148 User’s manual
5. Memory organization
41
Table 5. SFR Map (continued)
Address Function
Symbol
R/W
@Reset
7
6
5
4
3
2
1
0
A0H
P4 Data Register
P4
R/W
0
0
0
0
0
0
0
0
A1H
P0 Direction Register
P0IO
R/W
0
0
0
0
0
0
0
0
A2H
Extended Operation Register
EO
R/W
–
–
–
0
–
0
0
0
A3H
P4 Pull-up Resistor Selection Register
P4PU
R/W
0
0
0
0
0
0
0
0
A4H
External Interrupt Polarity 0 Low Register
EIPOL0L
R/W
0
0
0
0
0
0
0
0
A5H
External Interrupt Polarity 0 High Register
EIPOL0H
R/W
0
0
0
0
0
0
0
0
A6H
External Interrupt Flag 1 Register
EIFLAG1
R/W
0
0
–
–
0
0
0
0
A7H
External Interrupt Polarity 1 Register
EIPOL1
R/W
0
0
0
0
0
0
0
0
A8H
Interrupt Enable Register
IE
R/W
0
–
0
0
0
0
0
0
A9H
Interrupt Enable Register 1
IE1
R/W
–
–
0
0
0
0
0
0
AAH
Interrupt Enable Register 2
IE2
R/W
–
–
0
0
0
0
0
0
ABH
Interrupt Enable Register 3
IE3
R/W
–
–
0
0
0
0
0
0
ACH
P0 Pull-up Resistor Selection Register
P0PU
R/W
0
0
0
0
0
0
0
0
ADH
P1 Pull-up Resistor Selection Register
P1PU
R/W
0
0
0
0
0
0
0
0
AEH
P2 Pull-up Resistor Selection Register
P2PU
R/W
0
0
0
0
0
0
0
0
AFH
P3 Pull-up Resistor Selection Register
P3PU
R/W
0
0
0
0
0
0
0
0
B0H
P5 Data Register
P5
R/W
–
–
0
0
0
0
0
0
B1H
P1 Direction Register
P1IO
R/W
0
0
0
0
0
0
0
0
B2H
Timer 0 Control Register
T0CR
R/W
0
–
0
0
0
0
0
0
B3H
Timer 0 Counter Register
T0CNT
R
0
0
0
0
0
0
0
0
B4H
Timer 0 Data Register
T0DR
R/W
1
1
1
1
1
1
1
1
Timer 0 Capture Data Register
T0CDR
R
0
0
0
0
0
0
0
0
B8H
Interrupt Priority Register
IP
R/W
–
–
0
0
0
0
0
0
B9H
P2 Direction Register
P2IO
R/W
0
0
0
0
0
0
0
0
BAH
Timer 1 Control Low Register
T1CRL
R/W
0
0
0
0
–
0
0
0
BBH
Timer 1 Counter High Register
T1CRH
R/W
0
–
0
0
–
–
–
0
BCH
Timer 1 A Data Low Register
T1ADRL
R/W
1
1
1
1
1
1
1
1
BDH
Timer 1 A Data High Register
T1ADRH
R/W
1
1
1
1
1
1
1
1
BEH
Timer 1 B Data Low Register
T1BDRL
R/W
1
1
1
1
1
1
1
1
BFH
Timer 1 B Data High Register
T1BDRH
R/W
1
1
1
1
1
1
1
1