1.
Check that the input logical signals BLOCK, CBOPEN and VTSU are logical
zero.
2.
Supply a three-phase rated voltage in all three phases and note on the local HMI
that the TRIP logical signal is equal to the logical 0.
3.
Switch off the voltage in all three phases.
After set
tTrip
time a TRIP signal appears on the corresponding binary output or
on the local HMI.
Note that TRIP at this time is a pulse signal, duration should be
according to set
tPulse
.
4.
Inject the measured voltages at rated values for at least set
tRestore
time.
5.
Activate the CBOPEN binary input.
6.
Simultaneously disconnect all the three-phase voltages from the IED.
No TRIP signal should appear.
7.
Inject the measured voltages at rated values for at least set
tRestore
time.
8.
Activate the VTSU binary input.
9.
Simultaneously disconnect all the three-phase voltages from the IED.
No TRIP signal should appear.
10. Reset the VTSU binary input.
11. Inject the measured voltages at rated values for at least set
tRestore
time.
12. Activate the BLOCK binary input.
13. Simultaneously disconnect all the three-phase voltages from the IED.
No TRIP signal should appear.
14. Reset the BLOCK binary input.
10.5.5.2
Completing the test
Continue to test another function or end the test by changing the
TestMode
setting to
Off
. Restore connections and settings to their original values, if they were changed for
testing purposes.
10.6
Frequency protection
10.6.1
Underfrequency protection SAPTUF
Prepare the IED for verification of settings outlined in section
10.6.1.1
Verifying the settings
Verification of START value and time delay to operate
Section 10
1MRK 511 360-UEN A
Testing functionality by secondary injection
126
Bay control REC670 2.1 IEC
Commissioning manual