42 PCIE-5565RC* Ultrahigh Speed Fiber-Optic Reflective Memory with Interrupts
Publication No. 500-9300875565-000 Rev. C.0
Table 3-19 PCI Subsystem ID Register
PCI Subsystem ID: Offset $2E
Bit
Description
Read Write
*Value
after PCI
Reset
15:0
Subsystem ID (unique add-in board
device ID).
Yes
No
$0080
*
NOTE
: The value $0080 denotes a PLD Application PCI-X core.
Table 3-20 PCI Expansion ROM Base Register
PCI Expansion ROM Base: Offset $30
Bit
Description
Rea
d
Write
*Value
after
PCI
Reset
0
Address Decode Enable.
A one (1) indicates a device accepts accesses to the
Expansion ROM address.
A zero (0) indicates a device does not accept accesses to
Expansion ROM space. Should be set to zero (0) if there
is no Expansion ROM. Works in conjunction with
EROMRR[0].
Yes No
0
10:1
Reserved
Yes No
$0
31:1
1
Expansion ROM Base Address (upper 21 bits).
Yes Yes
$0
*
NOTE
: PCI Expansion ROM and related registers are not applicable to the Reflective
Memory.
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