Order no.
M13-CCF0000
Clock synchronization
ü
Synchronization via MPI
Master/Slave
Synchronization via Ethernet (NTP)
no
Address areas (I/O)
Input I/O address area
2048 Byte
Output I/O address area
2048 Byte
Input process image maximal
2048 Byte
Output process image maximal
2048 Byte
Digital inputs
144
Digital outputs
140
Digital inputs central
144
Digital outputs central
140
Integrated digital inputs
16
Integrated digital outputs
12
Analog inputs
2
Analog outputs
0
Analog inputs, central
2
Analog outputs, central
0
Integrated analog inputs
2
Integrated analog outputs
0
Communication functions
PG/OP channel
ü
Global data communication
ü
Number of GD circuits, max.
8
Size of GD packets, max.
54 Byte
S7 basic communication
ü
S7 basic communication, user data per job
76 Byte
S7 communication
ü
S7 communication as server
ü
S7 communication as client
-
S7 communication, user data per job
160 Byte
Number of connections, max.
32
PWM data
PWM channels
2
PWM time basis
1 µs / 0.1 ms / 1 ms
Period length
-
VIPA System MICRO
Hardware description
Technical data > Technical data CPU
HB400 | CPU | M13-CCF0000 | en | 16-47
51
Содержание VIPA System MICRO M13-CCF0000
Страница 35: ...3 2 2 Interfaces VIPA System MICRO Hardware description Structure Interfaces HB400 CPU M13 CCF0000 en 16 47 35 ...
Страница 211: ...Appendix VIPA System MICRO Appendix HB400 CPU M13 CCF0000 en 16 47 211 ...
Страница 212: ...Content A System specific event IDs B Integrated blocks VIPA System MICRO Appendix HB400 CPU M13 CCF0000 en 16 47 212 ...