Xycom XVME-212, Руководство пользователя

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XVME-212 Manual
August, 1989
3 . The data read at point B was the data present at the start of scan n+l, because the
data registers are not updated while the scanner is stopped.
4 . The data read at point B caused Change Register bit y to clear.
Polled operation is enhanced by bits 8-11 of the Extended Status Register. These bits are
set when the scanner detects any change bit set in a Change Register. These bits can be
polled to quickly determine whether any of the input channels have changed state since
the CPU last read the Data Registers. If bits 8-11 are zero, then no input channels have
changed since the CPU last read the Data Registers and there is no need to read the Data
Registers again. Polling the Extended Status Register instead of the Change Registers has
two advantages. First, because the scanner is not stopped, it doesn’t have to be restarted
after the read. Secondly, Status Register reads are faster because the scanner does not
have to be stopped before DTACK is asserted. It is therefore suggested that bits 8-11 of
the Extended Status be polled instead of polling the Data or Change Registers directly.
It is not necessary to read the Change Registers at all if the user is not concerned about
which individual bit in the change register is set. In these cases, the user would simply
read the Data Registers when the module generated an interrupt (in interrupt driven
environments) or when the status bits 8-11 indicate a change has occurred (in polled
environments).
3.12
RESETTING THE MODULE
The module is reset by the assertion of the VMEbus reset signal. In response to-a reset,
the module will do the following. All bits of the Extended Status and Control/Status
Registers will be reset to zero. (Note that this resets all Interrupt Enable bits of the
Status/Control Register so the VMEbus interrupt currently being generated by the
XVME-212 will be negated, and the SYSFAIL* will be asserted on the VMEbus because
bit 0 is reset to zero.) The scanner is stopped and the Data and Change Registers are reset
to zero. After the reset signal is negated, the scanner will start scanning. Before the first
scan, all Data and Change Registers will be zero. Therefore, after a reset, when an input
channel is detected as on, its corresponding Change Register bit will be set.
3-15
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