
XVME-200/290 Manual
December, 1987
During a VMEbus reset, all three PI/T ports (A, B, & C) assume an input direction.
Pull-up resistors present on bits PC0 and PC1 cause the port A and B data line
transceivers to assume an input direction.
Pull-up resistors also cause PORT C pins
3, 4, and 5 to go high at reset, thereby preventing the possibility of unintentional
interrupts (port or timer).
After reset, PORT C can be configured to conform to
the users needs (i.e., Port A and B transceiver direction, port and timer interrupt
control signals and timer I/O lines, and/or single-bit general purpose I/O). Figure
3-2 shows the direction for each PORT C pin as dictated by hardware config-
uration.
Some attention should be given to the possibility of generating
unintentional interrupts when configuring the direction of the PORT C pins. The
following procedure is an example of how PORT C could be initialized to appear as
it does in Figure 3-2.
1)
Write FFH to the PORT C Data register. This ensures that all PORT C pins
will be high when the direction of the pins is switched, thereby preventing the
possibility of unintentional interrupts (both port and timer) being generated.
2)
Write 1BH to the PORT C Direction register. This will configure the direction
of PORT C as shown in Figure 3-2, with the exception of pin 5 (PIRQ), which
remains an input to ensure
that port interrupts will not be generated
unintentionally.
3)
Individual PORT C bits can now be programmed to conform to the user’s
needs. At this point, port interrupts could be enabled by merely programming
the PC6/PIACK and PC5/PIRQ pins to support the interrupt and acknowledge
functions.
3.3.1.2
PI/T Port Interrupt Enabling
In order to enable the PI/T port interrupt capability PORT C must be programmed
s o t h a t p i n s PC5/PIRQ a n d PC6/PIACK s e r v e t h e p o r t i n t e r r u p t r e q u e s t a n d
acknowledge functions.
As such, the individual internal enable bits for Hl, H2, and
H3 determine whether a particular port function will generate a VMEbus interrupt.
NOTE
Handshake line H4 must be programmed
H4 interrupts must always be disabled.
as an output, and
When H2 interrupts are to be used, input pin H2 must be physically jumpered to
configure the line for inputs (refer to Section 2.4.5 of this manual for H2 jumper
definitions).
During the interrupt service routine, the “Direct Method” of clearing
the Hl, H2, or H3 status bits must be used to negate the interrupt (refer to the
68230 Manual for the “Direct Method” of clearing status bits).
3-7
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